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Prototype circuit components, parameters and measurement set-up
| Name | Parameter |
|---|---|
| Bus voltage (DC) | 24 V |
| Operating frequency | 10 MHz |
| Main transistors | 100 V (EPC2106) |
| Current mirror transistors | 100 V (EPC2106) |
| SyncFET | 100 V (EPC2037) |
| Reverse transfer capacitance (CRSS) | 0.5 pF |
| Sensing capacitor (CS) | 0.1 pF (Vishay VJ0402D0R1VXBAJHT) |
| Degeneration resistor (RS) | 4 Ω |
| Charge pump circuit supply (VCC) | 2.5 V |
| Gate drive voltage (vDRV) | 4.5 V |
| Gate resistor (RG) | 7 Ω |
| Gate driver IC | 200 V (Texas Instruments LMG1210) |
| Load inductor | 3.5 µH (Würth Elektronik 744771003) |
| Load current (iL) | 120 mA |
| Oscilloscope | UNI-T UPO3352E (350 MHz 2.5 GSa/s) |
| Probe | UT-P08A (350 MHz) |
Comparison of PON_loss for different dv/dt regulation techniques
| Technique | RG (Ω) | PONloss (mW) | dv/dt (V/ns) |
|---|---|---|---|
| Without dv/dt | 7 | 35.96 | 17 |
| Increasing RG | 13 | 61.79 | 11.12 |
| Capacitor-only dv/dt control | 7 | 54.03 | 11 |
| SyncFET dv/dt control | 7 | 55.78 | 10 |
Comparative performance analysis of the proposed work and previous studies
| Circuit parameters | Related literature | Proposed work | ||||
|---|---|---|---|---|---|---|
| Sun et al. (2016) | Bau et al. (2020) | Liu et al. (2023) | Yu et al. (2023) | Yang et al. (2024) | ||
| Power switch | GaN | GaN | GaN | GaN | GaN | GaN |
| Bus voltage | 300 V | 50 V | 300 V | 400 V | 200 V | 24 V |
| Operating frequency | Not reported | 1 MHz | 1 MHz | 1 MHz | 1 MHz | 10 MHz |
| Sensor capacitance | 47 pF (discrete) | 2 pF (discrete) | Not reported (parasitic CDS) | Not reported (parasitic CDS) | Not reported (integrated) | 0.1 pF (discrete) |
| Gain amplification method | Gate current control | Width/length ratio adjustment | Width/length ratio adjustment | Width/length ratio adjustment | Comparator | SyncFET |
| Flexibility of gain amplification method | High (discrete voltage follower) | Low (integrated CMOS) | Low (integrated LDMOS) | Low (integrated high-voltage LDMOS) | Low (silicon-on-insulator) | High (discrete N-channel GaN SyncFET) |
| AGD implementation | Discrete | Integrated | Integrated | Integrated | Integrated | Discrete |
| Switching loss reduction | 1.86% | 15.85% @ 20 pF CS | Not reported | 16.2% | 33.99% | 16.7% |
| Response time | >2 µs | <1 ns | Not reported | <3 ns | Not reported | <1 ns |
| dv/dt regulation | 8.8 V/ns | 6.3 V/ns | 14.3 V/ns | 63.7 V/ns | 22 V/ns | 10 V/ns |