Figure 1.
Traditional capacitor-based dv/dt sensor circuit for dv/dt control in GaN devices. GaN, gallium nitride.
Figure 2.
Proposed synchronous capacitive dv/dt sensor circuit for dv/dt control in MHz frequency GaN devices. GaN, gallium nitride; MHz, megahertz.
Figure 3.
The proposed SyncFET dv/dt sensor and AGD for turn-on dv/dt control. AGD, active gate driver; GaN, gallium nitride; SyncFET, synchronous GaN field-effect transistor.
Figure 4.
Simulated VGS_sync waveforms of the SyncFET circuit at different VCC voltages. SyncFET, synchronous GaN field-effect transistor.
Figure 5.
Simulated feedback current waveforms: (a) output from the 0.1 pF capacitor-only dv/dt sensor and (b) output from the 0.1 pF capacitor sensor enhanced by the proposed SyncFET circuit. SyncFET, synchronous GaN field-effect transistor.
Table 1.
Prototype circuit components, parameters and measurement set-up
| Name | Parameter |
|---|---|
| Bus voltage (DC) | 24 V |
| Operating frequency | 10 MHz |
| Main transistors | 100 V (EPC2106) |
| Current mirror transistors | 100 V (EPC2106) |
| SyncFET | 100 V (EPC2037) |
| Reverse transfer capacitance (CRSS) | 0.5 pF |
| Sensing capacitor (CS) | 0.1 pF (Vishay VJ0402D0R1VXBAJHT) |
| Degeneration resistor (RS) | 4 Ω |
| Charge pump circuit supply (VCC) | 2.5 V |
| Gate drive voltage (vDRV) | 4.5 V |
| Gate resistor (RG) | 7 Ω |
| Gate driver IC | 200 V (Texas Instruments LMG1210) |
| Load inductor | 3.5 µH (Würth Elektronik 744771003) |
| Load current (iL) | 120 mA |
| Oscilloscope | UNI-T UPO3352E (350 MHz 2.5 GSa/s) |
| Probe | UT-P08A (350 MHz) |
Figure 6.
Simulated waveforms of the resultant currents generated by the proposed AGD at different VCC voltages. AGD, active gate driver.
Figure 7.
Comparison between simulated waveforms of the gate currents at different operating conditions.
Figure 8.
Simulated VDS waveforms of the low-side GaN half-bridge under different operating conditions. GaN, gallium nitride.
Table 2.
Comparison of PON_loss for different dv/dt regulation techniques
| Technique | RG (Ω) | PONloss (mW) | dv/dt (V/ns) |
|---|---|---|---|
| Without dv/dt | 7 | 35.96 | 17 |
| Increasing RG | 13 | 61.79 | 11.12 |
| Capacitor-only dv/dt control | 7 | 54.03 | 11 |
| SyncFET dv/dt control | 7 | 55.78 | 10 |
Figure 9.
DC–DC buck converter test PCB (photograph). GaN, gallium nitride.
Figure 10.
Measured VGS waveform of the low-side GaN half-bridge at 4.5 V and 10 MHz. GaN, gallium nitride.
Figure 11.
Measured VDS waveform of the low-side GaN half-bridge during turn-off at 10 MHz. GaN, gallium nitride.
Figure 12.
Measured VDS waveform of the low-side GaN half-bridge during turn-on without dv/dt control. GaN, gallium nitride.
Figure 13.
Measured VDS waveform of the low-side GaN half-bridge during turn-on with the proposed dv/dt control. GaN, gallium nitride.
Figure 14.
Comparison of measured VDS waveforms of the low-side GaN device during turn-on with and without the proposed dv/dt control. GaN, gallium nitride.
Table 3.
Comparative performance analysis of the proposed work and previous studies
| Sun et al. (2016) | Bau et al. (2020) | Liu et al. (2023) | Yu et al. (2023) | Yang et al. (2024) | ||
|---|---|---|---|---|---|---|
| Power switch | GaN | GaN | GaN | GaN | GaN | GaN |
| Bus voltage | 300 V | 50 V | 300 V | 400 V | 200 V | 24 V |
| Operating frequency | Not reported | 1 MHz | 1 MHz | 1 MHz | 1 MHz | 10 MHz |
| Sensor capacitance | 47 pF (discrete) | 2 pF (discrete) | Not reported (parasitic CDS) | Not reported (parasitic CDS) | Not reported (integrated) | 0.1 pF (discrete) |
| Gain amplification method | Gate current control | Width/length ratio adjustment | Width/length ratio adjustment | Width/length ratio adjustment | Comparator | SyncFET |
| Flexibility of gain amplification method | High (discrete voltage follower) | Low (integrated CMOS) | Low (integrated LDMOS) | Low (integrated high-voltage LDMOS) | Low (silicon-on-insulator) | High (discrete N-channel GaN SyncFET) |
| AGD implementation | Discrete | Integrated | Integrated | Integrated | Integrated | Discrete |
| Switching loss reduction | 1.86% | 15.85% @ 20 pF CS | Not reported | 16.2% | 33.99% | 16.7% |
| Response time | >2 µs | <1 ns | Not reported | <3 ns | Not reported | <1 ns |
| dv/dt regulation | 8.8 V/ns | 6.3 V/ns | 14.3 V/ns | 63.7 V/ns | 22 V/ns | 10 V/ns |