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Digital Signal Processing Algorithm for Measurement of Settling Time of High-Resolution High-Speed DACs Cover

Digital Signal Processing Algorithm for Measurement of Settling Time of High-Resolution High-Speed DACs

Measurement Science Review
Volume 19 (2019): Issue 3 (June 2019)
By: Rokas Kvedaras,  Vygaudas Kvedaras,  Tomas Ustinavičius and  Ričardas Masiulionis  
Open Access
|Jun 2019

Authors

Rokas Kvedaras

rokas.kvedaras@vgtu.lt

Department of Electronic Systems, Electronics faculty, Vilnius Gediminas Technical University, Vilnius, Lithuania

Vygaudas Kvedaras

Department of Electrical Engineering, Electronics faculty, Vilnius Gediminas Technical University, Vilnius, Lithuania

Tomas Ustinavičius

Department of Electrical Engineering, Electronics faculty, Vilnius Gediminas Technical University, Vilnius, Lithuania

Ričardas Masiulionis

ricardas.masiulionis@vgtu.lt

Department of Electrical Engineering, Electronics faculty, Vilnius Gediminas Technical University, Vilnius, Lithuania
DOI: https://doi.org/10.2478/msr-2019-0014 | Journal eISSN: 1335-8871
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Language: English
Page range: 86 - 92
Submitted on: Jan 23, 2019
|
Accepted on: May 30, 2019
|
Published on: Jun 26, 2019
Published by: Slovak Academy of Sciences, Institute of Measurement Science
In partnership with: Paradigm Publishing Services
Publication frequency: Volume open
Keywords:
Digital filters,
active noise reduction,
Discrete Fourier transforms,
sampling method,
time measurement,
computerized instrumentation
Related subjects:
Engineering,
Electrical engineering,
Control engineering, metrology and testing

© 2019 Rokas Kvedaras, Vygaudas Kvedaras, Tomas Ustinavičius, Ričardas Masiulionis, published by Slovak Academy of Sciences, Institute of Measurement Science
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.

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