Abstract
This paper deals with a new concept of virtual testing engine for analogue-to-digital converters (ADCs). The whole system consists of program procedures to extract the most important ADC errors expressed in terms of integral and differential non-linearity (INL and DNL). The developed testbench is especially suitable for educational purpose because of modular conception of the system. The proposed testing engine is implemented in Maple™, bringing an ideal possibility to make a complex system for the simulations of ADC at the virtual level as well as at the circuit level. The system is a part of a complex environment using the Servo-loop and the Histogram method, combining their features so as to obtain high level of versatility. However, in this paper we concentrate only on the results from the Servo-loop method. The Servo-loop solution proposed here employs an effective search algorithm and improves convergence properties resulting in a significant reduction of the simulation time.