Loop profiling tool for HPC code inspection as an efficient method of FPGA based acceleration
By: Marcin Pietroń, Paweł Russek and Kazimierz Wiatr
Open Access
|Sep 2010Language: English
Page range: 581 - 589
Published on: Sep 27, 2010
Published by: University of Zielona Góra
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year
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© 2010 Marcin Pietroń, Paweł Russek, Kazimierz Wiatr, published by University of Zielona Góra
This work is licensed under the Creative Commons License.