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Design and analysis of a single-stage cascode LNA for S-band application in 180-nm CMOS technology Cover

Design and analysis of a single-stage cascode LNA for S-band application in 180-nm CMOS technology

Journal of Electrical Engineering
Volume 76 (2025): Issue 6 (December 2025)
By: Manish Kumar,  Abhishek Sharma,  Abhay Chaturvedi,  Manish Gupta,  Rajesh Kumar Singh and  Jyotsna Ladkani  
Open Access
|Dec 2025

Authors

Manish Kumar

manish.kumar@gla.ac.in

ECE Department, GLA University, Mathura, India

Abhishek Sharma

ECE Department, GLA University, Mathura, India

Abhay Chaturvedi

ECE Department, GLA University, Mathura, India

Manish Gupta

ECE Department, GLA University, Mathura, India

Rajesh Kumar Singh

Space Applications Centre (SAC), ISRO, Ahmedabad, India

Jyotsna Ladkani

Space Applications Centre (SAC), ISRO, Ahmedabad, India
DOI: https://doi.org/10.2478/jee-2025-0055 | Journal eISSN: 1339-309X | Journal ISSN: 1335-3632
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Language: English
Page range: 533 - 539
Submitted on: Sep 15, 2025
Published on: Dec 6, 2025
Published by: Slovak University of Technology in Bratislava
In partnership with: Paradigm Publishing Services
Publication frequency: 6 issues per year
Keywords:
low noise amplifier (LNA),
GPS,
CMOS,
cascode,
single-stage,
inductive degeneration,
noise figure,
process corners
Related subjects:
Engineering,
Introductions and overviews,
Engineering, other

© 2025 Manish Kumar, Abhishek Sharma, Abhay Chaturvedi, Manish Gupta, Rajesh Kumar Singh, Jyotsna Ladkani, published by Slovak University of Technology in Bratislava
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

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