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A simple reconfigurable microprocessor in a 36 macrocell CPLD Cover

A simple reconfigurable microprocessor in a 36 macrocell CPLD

Journal of the National Science Foundation of Sri Lanka
Volume 39 (2011): Issue 3
By: ,   and    
Open Access
|Sep 2011
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DOI: https://doi.org/10.4038/jnsfsr.v39i3.3630 | Journal eISSN: 2362-0161
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Language: English
Page range: 261 - 266
Published on: Sep 27, 2011
Published by: National Science Foundation of Sri Lanka
In partnership with: Paradigm Publishing Services
Keywords:
CPLD,
data acquisition,
FPGA,
microcontrollers,
reconfigurable computing,
VHDL

© 2011 W.A.S. Wijesinghe, M.K. Jayananda, D.U.J. Sonnadara, published by National Science Foundation of Sri Lanka
This work is licensed under the Creative Commons License.

Volume 39 (2011): Issue 3
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