References
- Cheng, K.-L., Tsai, M.-F. and Wu, C.-W. (2002). Neighborhood pattern sensitive fault testing and diagnostics for random access memories,(11): 1328-1336.
- Cockburn, B. F. (1995). Deterministic tests for detecting scrambled pattern-sensitive faults in RAMs,, pp. 117-122.
- Franklin, M. and Saluja, K. K. (1996). Testing reconfigured RAM's and scrambled address RAM's for pattern sensitive faults,(9): 1081-1087.
- Goor, A. J. v. d. (1991)., John Wiley & Sons, Chichester.
- Hayes, J. P. (1975). Detection of pattern-sensitive faults in random-access memories,(2): 150-157.
- Hayes, J. P. (1980). Testing memories for single-cell pattern-sensitive faults,(3): 249-254.
- Huang, Y. and Li, J. F. (2006). Testing active neighborhood pattern-sensitive faults of ternary content addressable memories,, pp. 55-62.
- Karpovsky, M. G., Goor, A. J. v. d. and Yarmolik, V. N. (1995). Pseudo-exhaustive word-oriented DRAM testing,, p. 126.
- Karpovsky, M. G. and Yarmolik, V. N. (1994). Transparent memory testing for pattern-sensitive faults,, pp. 860-869.
- Krasniewski, A. (2008). Concurrent error detection for combinational logic blocks implemented with embedded memory blocks of FPGAs,, pp. 74-79.
- Mrozek, I. and Yarmolik, V. N. (2008b). Optimal backgrounds selection for multi run memory testing,, pp. 332-338.
- Mrozek, I. and Yarmolik, V. N. (2008a). MATS+ transparent memory test for pattern sensitive fault detection,, pp. 493-498.
- Mrozek, I., Yarmolik, V. N. and Buslowska, E. (2008). Multiple run memory testing for PSF detection,, pp. 125-130.
- Nicolaidis, M. (1996). Theory of transparent BIST for RAMs,(10): 1141-1156.
- Niggemeyer, D., Redeker, M. and Otterstedt, J. (1998). Integration of non-classical faults in standard march tests,, p. 91.
- Sokol, B. and Yarmolik, S. V. (2006). Address sequences for march tests to detect pattern sensitive faults,, pp. 354-360.
- Sosnowski, J. (2007). Improving software based self-testing for cache memories,, pp. 49-54.
- Tubbs, J. D. (1989). A note on binary template matching,(4): 359-366.
- Voyiatzis, I. (2006). Accumulator-based compression in symmetric transparent RAM BIST,, pp. 273-278.
- Yarmolik, S. (2008). Address sequences and backgrounds with different Hamming distances for multiple run March tests,(3): 329-339, DOI: 10.2478/v10006-008-0030-y.
- Yarmolik, S. V. and Mrozek, I. (2007). Multi background memory testing,, pp. 511-516.
- Zhang, B. and Srihari, S. (2003). Binary vector dissimilarity measures for handwriting identification,, pp. 155-166.
- Zorian, Y. (2002). Embedded memory test and repair: Infrastructure IP for SOC yield,, p. 340.
Language: English
Page range: 191 - 205
Published on: Mar 25, 2010
Published by: University of Zielona Góra
In partnership with: Paradigm Publishing Services
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© 2010 Ireneusz Mrozek, published by University of Zielona Góra
This work is licensed under the Creative Commons License.