Consolidated SVPWM for Single-Phase Fault-Tolerant Control of CFNI-Based Inverter

1. Introduction

Fault-tolerant control has emerged as a fundamental requirement in traction drive systems (Orlowska-Kowalska et al., 2022), representing vital components in electric vehicles and other high-dependability applications. These systems incorporate various subsystems, such as inverters, sensors, motors and control units, to ensure efficient, uninterrupted operation.

Modern fault-tolerant control (FTC) systems for electrical vehicles (EV) traction drives typically combine three coordinated stages: fault detection and diagnosis (FDD), fault isolation, and control reconfiguration. Over the past decade, significant research efforts have been devoted to the development of advanced FDD and FTC strategies for various fault scenarios in electric drives (Ahmed Baba et al., 2023; Bhuiyan et al., 2020; Gherghina et al., 2025; Khaneghah et al., 2023; Kumar et al., 2025; Li et al., 2025; Orlowska-Kowalska et al., 2022; Romdhane et al., 2026a,b). For instance, several studies have addressed inter-turn short-circuit (ITSC) faults in permanent magnet synchronous motors (PMSMs) using model-based, signal-based, and artificial intelligence techniques (Orlowska-Kowalska et al., 2022; Romdhane et al., 2026a,b; Zerdani et al., 2022; Zhang et al., 2025, 2023). Current, speed, and position sensor faults, including offset, gain, and complete signal loss, have also received considerable attention, with active FTC approaches based on observers, adaptive estimation, and neural networks (Adamczyk and Orłowska-Kowalska, 2023; Kommuri et al., 2016; Orlowska-Kowalska et al., 2022; Teler, 2026; Yousfi et al., 2009). Likewise, numerous contributions have focused on inverter switch faults, through fast detection algorithms and control reconfiguration methods (Altin et al., 2018; Bianchi et al., 2003a; De Araujo Ribeiro et al., 2004; Elsayed et al., 2022; Estima and Cardoso, 2012; Fadil et al., 2018; Hicham et al., 2017; Miraoui, 2025; Orlowska-Kowalska et al., 2022; Zerdani et al., 2019, 2021; Zhiduan and Lihao, 2024b). These studies demonstrate the growing interest in enhancing the reliability and availability of traction drive systems under a wide range of fault conditions.

The present study focuses on single-phase faults in drive systems, including loss of a phase-current measurement, failure of an inverter phase leg and loss of one motor phase. Once the faulty phase is identified and isolated, continued operation requires an alternative current path with an appropriate post-fault control strategy. Therefore, the converter topology plays a decisive role in determining the achievable performance under degraded operating conditions.

1.1. State of the art

Several fault-tolerant inverter configurations have been proposed to maintain the operation of electric drives after a single-phase fault (Mirafzal, 2014; Tousizadeh et al., 2019; Welchko et al., 2004; Zhang et al., 2021, 2014). Among the representative configurations reported in the literature are the switched-based four-leg inverter (SFI; Figure 1a), the capacitor-based four-leg inverter (CFI; Figure 1b), the switched-based four-leg neutral-point-connected inverter (SFNI; Figure 1c), and the capacitor-based four-leg neutral-point-connected inverter (CFNI; Figure 1d).

Figure 1.

CFI topology has been extensively investigated for fault-tolerant operation (Fadil et al., 2018; Hang et al., 2023; Hicham et al., 2017; Huang et al., 2021; Hu et al., 2021; Li et al., 2019; Zerdani et al., 2019, 2021; Zhiduan and Lihao, 2024a; Zhu et al., 2017), whereas SFNI has been considered in previous fault-tolerant drive studies (Bianchi et al., 2003b; Bolognani et al., 1998; Kim and Sul, 2004; Meinguet and Gyselinck, 2009). In contrast, comparatively limited attention has been devoted to CFNI topology despite its reduced semiconductor requirements (Liu, 1993; Miraoui, 2025).

To clarify the trade-offs among these topologies, Table 1 summarizes the four representative configurations in terms of DC-bus structure, motor neutral accessibility, auxiliary semiconductor devices, semiconductor overrating cost factor (SOCF), post fault power ration factor (PPRF), attainable post-fault torque and fault-tolerant capability (Foster et al., 2010; Mirafzal, 2014; Tousizadeh et al., 2019; Welchko et al., 2004; Zhang et al., 2021, 2014).

Table 1.

Comparative analysis of SFI, CFI, SFNI, and CFNI topologies.

TRIAC	IGBT	Inverter side	Motor side
SFI (a)	Non	Non	3	2	1.83	1	1	√	×
CFI (b)	Oui	Non	3	0	1.5	0.5	1	√	×
SFNI (c)	Non	Oui	1	2	1.86	0.58	0.58	√	√
CFNI (d)	Oui	Oui	1	0	1.28	0.5	0.58	√	√

[i] CFI, capacitor-based four-leg inverter; CFNI, capacitor-based four-leg neutral-point-connected inverter; PPRF, post-fault power ratio factor; SFI, switched-based four-leg inverter; SFNI, switched-based four-leg neutral-point-connected inverter; SOCF, semiconductor overrating cost factor.

Here, PPRF denotes the maximum achievable post-fault apparent power normalised by the rated apparent power under healthy conditions. SOCF represents the weighted apparent power rating of the complete set of semiconductor devices normalised with respect to that of the six insulated-gate bipolar transistors (IGBT) in a conventional healthy three-phase inverter. The calculation assumes that each semiconductor device withstands a DC-bus voltage of 1 pu and conducts a phase-current root mean square (RMS) of 1 pu. Under these assumptions, the conventional healthy inverter exhibits an SOCF of 1.

The comparison highlights a fundamental compromise between post-fault capability and hardware complexity. The SFI preserves the rated torque but requires three triodes for alternating current (TRIAC) and two additional IGBTs, resulting in a relatively high SOCF of 1.83. The CFI eliminates the additional IGBTs and reduces the SOCF to 1.50, although its post-fault power capability is reduced. The SFNI can accommodate single-phase faults on either the inverter or motor side but requires additional semiconductor devices and exhibits the highest SOCF among the four topologies. In comparison, the CFNI requires only one auxiliary TRIAC and no additional IGBTs, yielding the lowest SOCF of 1.28 while retaining the capability to accommodate both inverter- and motor-side phase faults.

However, the CFNI presents some limitations. Its PPRF is reduced, especially under phase-loss (PL), and the post-fault torque and operation range are limited. In addition, the topology relies on a split DC bus and, therefore, requires sufficiently large DC-link capacitances to limit midpoint-voltage fluctuations. Despite these constraints, its low semiconductor count, structural simplicity, reduced SOCF and its capability to accommodate both inverter and motor-side phase faults make the CFNI particularly attractive for fault-tolerant traction applications where converter cost, volume and complexity are important considerations.

2. SVPWM for Faulty Case

The development of the proposed SVPWM strategy for CFNI topology is inspired by the principles of conventional SVPWM for healthy operating conditions in a three-phase inverter, which have been extensively reported in the literature (Bin Ibrahim et al., 2014; Kumar et al., 2010; Shu et al., 2007; YingYing et al., 2011).

2.1. Sector of the reference voltage vector

Starting with the case of a fault in phase a, after detecting a failure, the damaged phase is electrically isolated; then, using the TRIAC, the neutral point is connected to the midpoint DC-link capacitor as shown in Figure 1d.

The model describing the three-phase output voltage is presented as follows:

(1)

$$\left.\begin{array}{l}{\text{u}}_{\text{an}}\hfill \\ {\text{u}}_{\text{bn}}\hfill \\ {\text{u}}_{\text{cn}}\hfill \end{array}\right]=\left.\begin{array}{c}0\\ {\text{S}}_{\text{b}}{\text{u}}_{\text{c}1}+({\text{S}}_{\text{b}}-1){\text{u}}_{\text{c}2}\\ {\text{S}}_{\text{c}}{\text{u}}_{\text{c}1}+({\text{S}}_{\text{c}}-1){\text{u}}_{\text{c}2}\end{array}\right]$$

S_a, S_b, and S_c represent the switching states of the three-leg transistors.

Considering the voltage oscillation at the capacitor midpoint and taking Δu as the voltage offset gives the expression of $u_{c1}=\frac{1}{2}{V}_{\mathit{dc}}+\Delta u$ and $u_{c2}=\frac{1}{2}{V}_{\mathit{dc}}+\Delta u$ .

The transformed a-b-c to α-β coordinates using Clarke transformation A with u_an = 0 is expressed in Eq. (2).

(2)

$$\left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]=\text{A}.\left.\begin{array}{l}0\hfill \\ {\text{u}}_{\text{bn}}\hfill \\ {\text{u}}_{\text{cn}}\hfill \end{array}\right]=\frac{2}{3}\left.\begin{array}{lll}1\hfill & -\frac{1}{2}\hfill & -\frac{1}{2}\hfill \\ 0\hfill & \frac{\sqrt{3}}{2}\hfill & -\frac{\sqrt{3}}{2}\hfill \end{array}\right]\cdot \left.\begin{array}{l}0\hfill \\ {\text{u}}_{\text{bn}}\hfill \\ {\text{u}}_{\text{cn}}\hfill \end{array}\right]=\left.\begin{array}{c}-\frac{1}{3}{\text{u}}_{\text{bn}}-\frac{1}{3}{\text{u}}_{\text{cn}}\\ \frac{1}{\sqrt{3}}{\text{u}}_{\text{bn}}-\frac{1}{\sqrt{3}}{\text{u}}_{\text{cn}}\end{array}\right]$$

Considering Eqs (1) and (2), the inverter's model in α-β coordinates is expressed in Eq. (3).

(3)

$$\left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]=\left.\begin{array}{c}-\frac{1}{3}{\text{V}}_{\text{dc}}({\text{S}}_{\text{b}}+{\text{S}}_{\text{c}}-1)-\frac{2}{3}\Delta \text{u}\\ \frac{1}{\sqrt{3}}{\text{V}}_{\text{dc}}({\text{S}}_{\text{b}}+{\text{S}}_{\text{c}})\end{array}\right]$$

By combining the states of the four available inverter switches and, for simplicity in analysis and description, assuming Δu = 0, four voltage space vectors are obtained and their components are summarised in Table 2.

Table 2.

Available voltage vectors with neutral point connected to the midpoint of the DC-link capacitor and phase a eliminated.

Sb	Sc	uα	uβ	Vx	Amplitude
0	0	Vdc/3	0	V1	Vdc/3
0	1	0	$-V_{\mathit{dc}}/\sqrt{3}$	V4	$V_{\mathit{dc}}/\sqrt{3}$
1	0	0	$V_{\mathit{dc}}/\sqrt{3}$	V2	$V_{\mathit{dc}}/\sqrt{3}$
1	1	−Vdc/3	0	V3	Vdc/3

For the cases of faults in b or c, and by following the same analysis used in a, we obtain four voltage space vectors as reported in Tables 3 and 4.

Table 3.

Available voltage vectors with neutral point connected to the midpoint of the DC-link capacitor and phase b eliminated.

Sc	Sa	uα	uβ	Vx	Amplitude
0	0	−Vdc/6	$\sqrt{3}{V}_{\mathit{dc}}/6$	V1	Vdc/3
0	1	Vdc/2	$\sqrt{3}{V}_{\mathit{dc}}/6$	V4	$V_{\mathit{dc}}/\sqrt{3}$
1	0	−Vdc/2	$-\sqrt{3}{V}_{\mathit{dc}}/6$	V2	$V_{\mathit{dc}}/\sqrt{3}$
1	1	Vdc/6	$-\sqrt{3}{V}_{\mathit{dc}}/6$	V3	Vdc/3

Table 4.

Available voltage vectors with neutral point connected to the midpoint of the DC-link capacitor and phase c eliminated.

Sa	Sb	uα	uβ	Vx	Amplitude
0	0	−Vdc/6	$-\sqrt{3}{V}_{\mathit{dc}}/6$	V1	Vdc/3
0	1	−Vdc/2	$\sqrt{3}{V}_{\mathit{dc}}/6$	V4	$V_{\mathit{dc}}/\sqrt{3}$
1	0	Vdc/2	$-\sqrt{3}{V}_{\mathit{dc}}/6$	V2	$V_{\mathit{dc}}/\sqrt{3}$
1	1	Vdc/6	$\sqrt{3}{V}_{\mathit{dc}}/6$	V3	Vdc/3

Based on the three summarised tables, the distribution of the basic voltage vectors in the α-β coordinate system is illustrated in Figure 2.

Figure 2.

2.2. Unification of the three cases

To address the complexity of implementing three separate SVPWM algorithms for each phase fault, a unified SVPWM approach is proposed in this section.

By comparing the three basic voltage vector distributions in Figure 2, it can be observed that they contain the same number of vectors with identical amplitudes, while differing only in the angular positions of the vectors in the αβ plane. Therefore, the three distributions can be expressed in a common α′β′ representation through an appropriate coordinate rotation. For the distribution in Figure 2a, no rotation is required and the α′β′ axes coincide with the original αβ axes. For Figure 2b, the α′β′ axes are rotated by $\frac{2\pi }{3}$ with respect to the αβ axes, leading to the coordinate transformation given in Eq. (4). Similarly, for Figure 2c, the α′β′ axes are rotated by $\frac{-2\pi }{3}$ with respect to the original αβ axes, resulting in the transformation given in Eq. (5).

After these transformations, the three cases exhibit the same basic voltage vector distribution in the α′β′ plane, thereby enabling the development of a unified SVPWM approach.

(4)

$$\left.\begin{array}{c}{\text{u}}_{\alpha }{}^{\prime }\\ {\text{u}}_{\beta }{}^{\prime }\end{array}\right]=\left.\begin{array}{ll}\cos \frac{2\pi }{3}\hfill & \sin \frac{2\pi }{3}\hfill \\ -\sin \frac{2\pi }{3}\hfill & \cos \frac{2\pi }{3}\hfill \end{array}\right].\left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]=\left.\begin{array}{cc}-\frac{1}{2}& \frac{\sqrt{3}}{2}\\ -\frac{\sqrt{3}}{2}& -\frac{1}{2}\end{array}\right]\cdot \left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]$$

(5)

$$\left.\begin{array}{c}{\text{u}}_{\alpha }{}^{\prime }\\ {\text{u}}_{\beta }{}^{\prime }\end{array}\right]=\left.\begin{array}{ll}\cos \frac{-2\pi }{3}\hfill & \sin \frac{-2\pi }{3}\hfill \\ -\sin \frac{-2\pi }{3}\hfill & \cos \frac{-2\pi }{3}\hfill \end{array}\right].\left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]=\left.\begin{array}{cc}-\frac{1}{2}& -\frac{\sqrt{3}}{2}\\ \frac{\sqrt{3}}{2}& -\frac{1}{2}\end{array}\right]\cdot \left.\begin{array}{l}{\text{u}}_{\alpha }\hfill \\ {\text{u}}_{\beta }\hfill \end{array}\right]$$

In the sections that follow, we will present the additional steps required to complete the SVPWM process based on the common voltage vectors depicted in Figure 3.

Figure 3.

2.3. Sector identification

The sector selection is determined according to the flowchart illustrated in Figure 4, based on the common voltage vectors in the α′β′ plane shown in Figure 3.

Figure 4.

2.5. Switching sequence generation

To reduce switching losses, it is necessary to optimise the switching sequence. Figure 5 illustrates the possible switching sequences. As can be observed, the active vectors are selected by considering the switching states of the power switches in Table 2. Consequently, only one switch changes its state during each transition, thereby minimising switching losses.

Figure 5.

The notation (PWMx, PWMy) was adopted to provide a generalised formulation independent of the faulty phase. Specifically, under a phase-a fault, it corresponds to (PWMb, PWMc), under a phase-b fault, to (PWMc, PWMa), and under a phase-c fault, to (PWMa, PWMb). This notation was derived from the analysis of Tables 2–4, which led to the formulation of Table 6.

Table 6.

Summarised switching states for the three faulty cases.

	Fault in a		Fault in b		Fault in c
	Sx	Sy	S x	Sy	S x	Sy
	Sb	Sc	Sc	Sa	Sa	Sb
V1	0	0	0	0	0	0
V2	1	1	1	0	0	0
V3	1	1	1	1	1	1
V4	0	0	0	1	1	1

3. Control System Block Diagram

FOC is a widely used technique for managing a standard three-phase PMSM by separating the control of magnetic flux and torque via the d- and q-current axes (Chikh et al., 2011; Miraoui et al., 2025; Nicola et al., 2022). In this remedial strategy, as shown in Figure 7, the same FOC method is employed to produce the components V_d and V_q which are then transformed from the d-q to α-β coordinate system before being input into the consolidated SVPWM in Figure 6.

Figure 6.

Figure 7.

As inputs Uα and Uβ are processed through the system, the conventional SVPWM directly generates the six switching signals under healthy operation. However, if a fault occurs and is detected, the fault detection signal, which is represented in Figure 6 by a three-bit signal fault detection (FD) (F_a, F_b, F_c ), activates the SVPWM algorithm for the faulty operation. Each bit identifies the corresponding faulty phase, where F_a, F_b, and F_c are associated with phases a, b, and c, respectively. Under a fault in phase a, only the bit F_a is set to 1.

In the faulty case, the processing is carried out using Uα′ and Uβ′ as inputs, obtained from Eq. (9). Eq. (9) combines the coordinate transformations introduced in Eqs (4) and (5) with the FD signal to automatically select the appropriate transformation according to the faulty phase. For example, when F_b = 1, Eq. (9) reduces to Eq. (4). Thus, regardless of the faulty phase, the voltage vectors are expressed in the common α′β′ reference frame shown in Figure 3.

The unified SVPWM generates the two switching signals S_x and S_y, which must be assigned to the two healthy phases according to the detected faulty phase. To map these output signals to the corresponding healthy phases, Eq. (10) is employed. This equation is derived from the relationships summarised in Table 6. For example, for a phase-b fault, F_b = 1, Eq. (10) gives S_c = S_x and S_a = S_y.

4. Simulation and Results

The proposed remedial strategy illustrated in Figure 7, together with the power configuration, was evaluated through a co-simulation approach using power simulation (PSIM) and MATLAB/Simulink (The MathWorks, MATLAB R2018b, United States). The control scheme was developed in MATLAB/Simulink, and the power structure was implemented in PSIM. The nominal ratings and parameters of the PMSM and CFNI used in the simulations are provided in Table 7.

Three separate single-phase fault scenarios were considered by introducing a fault in phases a, b, and c. In each case, the fault was applied at t = 1 s. Following fault occurrence, the faulty leg was isolated, and the TRIAC shown in Figure 1d was triggered to connect the motor neutral point to the midpoint of the DC-link capacitors. Simultaneously, the consolidated SVPWM switches from the conventional SVPWM to the proposed post-fault modulation strategy.

The PMSM initially operated at a speed reference of 1,500 rpm and a torque reference of 1 Nm. At t = 2 s, the torque reference was increased from 1 Nm to 2 Nm. Additional speed reference variations were then applied under post-fault operation to evaluate the performance of the proposed strategy at different operating points. The following analysis separately evaluates the speed, torque, and current performances using quantitative indices in addition to the time-domain responses.

Figure 8 presents the rotor-speed response before and after fault occurrence. Under healthy operation, the measured speed follows the reference at 1499.8 rpm, corresponding to a relative error of 0.013%.

Figure 8.

The enlarged view at 1 s shows that the transition from healthy to post-fault operation introduces a very small perturbation, and the speed remains tightly regulated around its reference immediately after reconfiguration.

Furthermore, as shown in Figure 8, the PMSM continues to follow the changes of the speed reference from 1,500 rpm to 2,500 rpm and later to 2,000 rpm, demonstrating that the proposed approach preserves the speed tracking capability after fault accommodation.

Figure 9 presents the rotor torque response under healthy and faulty conditions. The torque follows the 1 Nm reference with a mean value of 1.003 Nm under healthy operation and 0.9999 Nm after fault reconfiguration, confirming the capability of the proposed strategy to preserve the average torque production.

Figure 9.

The main post-fault effect is, therefore, an increase in torque oscillations: the torque ripple increases from approximately 0.56% to 1.61%, while the torque distortion rises from 0.14% to 0.33%. Nevertheless, the torque reference remains accurately tracked after the load increase to 2 Nm at t = 2 s.

Figure 10 presents the phase and neutral currents for faults occurring in phases a, b, and c. Before the fault, the three-phase currents are balanced. After reconfiguration, the current of the faulty phase is suppressed while the two healthy phase currents are increased and the neutral current becomes the sum of the two healthy phase currents.

Figure 10.

Table 8 summarises the current amplitudes and phase displacements before and after fault occurrence in the three fault scenarios.

In line with observations in the literature (Bianchi et al., 2003b; Bolognani et al., 1998; Kim and Sul, 2004; Liu, 1993; Meinguet and Gyselinck, 2009), the phase-current displacement is reduced to one-sixth of a period, while the amplitude of the current increases from 1.105 A to 1.909 A, corresponding to approximately 1.73 times the healthy value. Additionally, the amplitude of the neutral current reaches 3.315 A, three times higher than the phase currents under normal operation. This increase results from the need to maintain electromagnetic torque after the loss of one phase, requiring the two remaining healthy phases to carry higher currents.

The harmonic quality of the currents was evaluated through FFT analysis, as shown in Figure 11. The results show that the current THD remains below 1%, with a value of 0.28% for a speed of 1,500 rpm.

Figure 11.

The combined speed, torque and current results confirm the effectiveness of the proposed remedial strategy. In terms of practical limitations, maintaining the increased post-fault current levels for extended durations may require oversizing of the inverter switches and leads to increased copper losses in the motor. Alternatively, the allowable peak currents of both the inverter and the motor, together with their permissible overload durations, must be considered. As these limits are approached, a smooth transition towards a degraded operating mode should be applied to avoid an abrupt torque loss, while protecting the drive from excessive electrical and thermal stress.

From an implementation perspective, this unified approach reduces the number of required SVPWM algorithms from four to two. Without consolidation, the complete controller would require one conventional SVPWM for healthy operation and three dedicated SVPWM algorithms corresponding to the three possible faulty phases. This consolidation reduces the number of algorithms and simplifies the control architecture. Since the present study is simulation-based, no specific digital processor is considered; therefore, execution time and memory savings are not quantitatively reported.

5. Conclusion

This paper presented a single-phase FTC strategy applicable to traction drive systems, employing a consolidated SVPWM technique dedicated to a CFNI. The proposed approach unifies the modulation process for faults occurring in phases a, b, and c, thereby avoiding the use of three separate fault-dependent SVPWM algorithms and simplifying the control implementation.

This method was demonstrated through simulations on a PMSM considering faults independently occurring in phases a, b, and c. Simulation results confirmed that, after fault detection and converter reconfiguration to eliminate the faulty phase, the torque production and speed tracking are maintained continuously. The two healthy phase currents increase to approximately 1.73 times their healthy state value, with the required phase displacement, while the neutral current ensures the return path. The proposed approach also preserves good waveform quality under post-fault operation; current THD remains below 1% in the investigated operating conditions. The results obtained under load and speed variation further demonstrate the ability to maintain stable operation.

Nonetheless, maintaining the increased post-fault currents for extended periods may require oversized inverter switches and lead to higher motor copper losses. Otherwise, overload capability and permissible duration must be considered. Once these limits are attained, a smooth transition towards a degraded operation mode should be applied to avoid abrupt torque loss and excessive electrical and thermal stress.

Overall, the proposed consolidated SVPWM provides an effective solution for fault-tolerant operation of CFNI-based PMSM traction drive systems. Future work could focus on experimental validation across different motor types and, therefore, extend the approach to other high-dependability applications.