Figure 1.
Conventional buck converter.
Figure 2.
Proposed two-switch buck converter.
Figure 3.
Typical waveforms during one cycle under steady-state operation.
Figure 4.
Modes of operation (Modes I to IV). Modes of operation (Modes V to VIII).
Figure 5.
Waveforms of currents in SW1, CS1, D1 and LF and voltage across SW1 and CS1 with respect to corresponding gate pulses at a duty-ratio of 30% and switching frequency fsw = 40 kHz.
Figure 6.
Waveforms of currents in SW2, CS2, D2 and LF and voltage across SW2 and CS2 with respect to corresponding gate pulses at a duty ratio of 30% and switching frequency fsw = 40 kHz.
Figure 7.
Waveforms of currents in SW1, CS1 and D1 with respect to the corresponding gate pulses Vg (SW1) at a duty ratio of 60%.
Figure 8.
Waveforms of currents in SW2, CS2 and D2 with respect to the corresponding gate pulses Vg (SW2) at a duty ratio of 60%.
Figure 9.
Waveforms of currents in SW1 and SW2, filter inductor LF corresponding to their gating pulses of both switches at a duty ratio of 60% and switching frequency fsw = 40 kHz.
Figure 10.
Waveforms of gate pulses, currents, voltage across switches (SW1, SW2), diode currents (D1 and D2), snubber capacitor currents (ICS1, ICS2) and current in filter inductor LF corresponding to their gating pulses of both switches at a duty ratio of 60% and switching frequency of 40 kHz.
Figure 11.
Waveforms of currents in filter inductor, filter capacitor, load and load voltage at a duty ratio of 60%.
Figure 12.
Waveforms of currents in ISW1. ID1, VSW1 and Vo at a duty ratio of 30%.
Figure 13.
Waveforms of currents in ISW2. ID2, VSW2 and Vo at a duty ratio of 30%.
Figure 14.
Waveforms of Vg (SW1), Vg (SW2), ISW1 and ISW2 for a few cycles and output voltage Vo at a duty ratio of 30% and input Vs = 30 V.
Figure 15.
Waveforms of Vg (SW1), Vg (SW2), ISW1 and ISW2 for a few cycles and output voltage Vo at a duty ratio of 40% and input Vs = 30 V.
Table 1.
Output voltage profile of the proposed buck converter for an input voltage of 30 V.
| K (%) | Output voltage of buck converter (V) | Output voltage of proposed buck converter(V) |
|---|---|---|
| 20 | 6 | 5.58 |
| 30 | 9 | 8.3 |
| 40 | 12 | 11.5 |
| 50 | 15 | 14.62 |
| 60 | 18 | 17.5 |
| 70 | 21 | 20.74 |
| 80 | 24 | 23.6 |
| 85 | 25.5 | 25.2 |
Figure 16.
Waveforms of ISW1 and VSW1 at a duty ratio of 60%.
Figure 17.
Waveforms of ISW2 and VSW2 at a duty ratio of 60%.
Figure 18.
Waveforms of current in the filter inductor and load voltage with respect gating pulse of both switches at a duty ratio of 60%.
Table 2.
Comparison between the conventional half-bridge and the proposed half-bridge structure.
| Sl. No. | Conventional half-bridge converter | Proposed half-bridge structure |
|---|---|---|
| 1 | Snubber circuit contains three components (resistance, diode and capacitance) | The snubber circuit contains only capacitance |
| 2 | Filter ratings (LF and CF) are as per their designed values | A modified filter is required. The rating of the filter inductor is quite less, and the rating of the filter capacitor is very large as compared to a conventional one |
| 3 | Unidirectional current in the filter inductor | Bidirectional current in the filter inductor during each switching cycle |
| 4 | Hard switching of devices | Soft-switching of devices |