Overvoltage Crowbar Protection Based on Passive Power Supplied Control Unit

The overvoltage protection concept presented here was developed for a single cell of a cascaded H-bridge converter, as illustrated in Figure 1.

Figure 1.

Cascaded H-bridge cells concept.

In general, the need for such protection depends on the type of devices connected to the DC inputs of the cells shown in Figure 1. Overvoltage conditions may originate from disturbances on the connected grid lines, caused by atmospheric transients.

If the transient overvoltage occurs on the AC side of the H-bridge, it is rectified through the clamping diodes of the bridge cell transistors, resulting in the charging of the input capacitor C_IN. If the C_IN capacity is directly connected to a battery string, the incoming energy can typically be absorbed without issue. However, when a unidirectional converter is connected to the H-bridge cell input, and it cannot sink the current from the overcharged C_IN, the voltage across the capacitor may exceed safe limits and potentially damage connected components.

Furthermore, if the output of the H-bridge cell is not directly connected to a mechanical switching device, typically a contactor or fuse switch disconnector, and a line of cable is present between the converter output and the mechanical switching element, an overvoltage may be induced along this cable. This phenomenon can occur even when the converter is inactive, potentially leading to an unintended charge of the input capacitor C_IN while the system is in sleep mode.

In this case, the system of overvoltage protection must remain operational even when the converter is powered down. A passive protection element, such as a spark gap, can fulfil this requirement. However, this type of protection lacks precision in setting the breakdown voltage that an electronically controlled crowbar can offer. The proposed solution addresses this by employing a crowbar circuit powered from a passive power supply.

Generally, the proposed crowbar intervenes if the overvoltage on C_IN originates for any reason. Nevertheless, the proposed protection is mainly focused on the case of an H-bridge with blocked power transistors in sleep mode. In this case, the overvoltage wave can come from the AC side and be rectified by the clamping diodes, charging C_IN.

If the voltage wave triggering the crowbar is transient, the crowbar just discharges the C_IN capacity, and the current loop is interrupted. If the nominal AC voltage on the AC line is present at the same time, the crowbar intervention secondary causes the AC side fuse operation, which has to be installed there, as depicted in Figure 2.

Figure 2.

H-bridge cell overvoltage protection implementation (Strossa et al., 2024).

The input is assumed to be on the left side and the output on the right side of the circuit diagram depicted in Figures 1 and 2. Furthermore, this is the default arrangement for the next descriptions. But generally, the proposed crowbar protection is intended for bidirectional H-bridges, which means that the input and output of Figures 1 and 2 can be interchanged from the point of view of energy transfer direction.

The fundamental design requirement coming out from the cascade structure of the cell cascade was to protect each individual cell independently, while meeting the following set of parameters:

The following concept of cell overvoltage protection was suggested according to the parameters listed in Table 1.

In general, thyristors represent a highly suitable choice for use as crowbar switches due to their robustness and their relatively high tolerance for non-repetitive current overloads when compared with other semiconductor switching components.

Another advantageous characteristic of thyristors in this context is their ability to remain in the conducting state once triggered, until the anode current drops below the holding threshold. This behaviour allows the crowbar to stay active even after the input capacitor C_IN has been discharged, in the event that a temporary current source appears on the AC side of the H-bridge cell. This feature becomes particularly valuable when the crowbar control circuit loses its passive power supply following the discharge of C_IN.

The following power circuit was suggested within the proposed overvoltage protection.

The input inductor L, shown in Figure 3, fulfils three essential roles within the crowbar circuit. First, it moderates the rate at which the breakdown current increases, ensuring compliance with the thyristor’s di/dt specification. Second, in combination with resistor R, it limits the peak amplitude of the breakdown current. Third, it provides decoupling from fast voltage ripple on C_IN, which is generated on the capacitor parasitic serial inductance by the pulse-width modulation of the H-bridge transistors, and thereby preventing these oscillations from affecting the crowbar thyristors.

Figure 3.

Proposed overvoltage protection power circuit, link capacity discharging current loop of the first stage thyristor T₁ activated (a), link capacity discharging current loop of the second stage thyristor T₂ activated (b), crowbar excited inductor current after link capacity discharged (c).

The overvoltage protection activates when the voltage across C_IN exceeds the breakdown threshold V_BR, as listed in Table 1. At this point, the crowbar begins to bypass the input capacitor, initiating a clamping current loop through C_IN, L, and R. The rate of current increase is most pronounced at the initial moment of activation. For this specific time interval, the following expression is defined: (1) VBR=L⋅ΔIRΔtR, {V_{{\rm{BR}}}} = L \cdot {{\Delta {I_{\rm{R}}}} \over {\Delta {t_{\rm{R}}}}}, where V_BR is the overvoltage protection breakdown voltage (V). The H-bridge input capacity is charged to this value at the beginning of the discharging process, and ΔIRΔtR {{\Delta {I_{\rm{R}}}} \over {\Delta {t_{\rm{R}}}}} is the current slope (A/s).

The minimal value of the inductivity according to the di/dt thyristor parameter can be expressed from Eq. (1) as: (2) L=VBRΔIRΔtR, L = {{{V_{{\rm{BR}}}}} \over {{{\Delta {I_{\rm{R}}}} \over {\Delta {t_{\rm{R}}}}}}},

The prototype of the proposed crowbar overvoltage protection was implemented using the Semikron manufactured SKKT 42/08E thyristor. This component is specified with a maximum allowable current rise rate of 150 A/μs.

To ensure compliance with this limitation, the required inductance value can be determined by applying Eq. (2): (3) LMIN1=VBRΔIRΔtR=30015010−6=2μH, {L_{{\rm{MIN}}1}} = {{{V_{{\rm{BR}}}}} \over {{{\Delta {I_{\rm{R}}}} \over {\Delta {t_{\rm{R}}}}}}} = {{300} \over {{{150} \over {{{10}^{ - 6}}}}}} = 2\mu {\rm{H}}, where L_MIN1 is the minimal inductivity (H) to pass the di/dt thyristor limit.

The following analysis comes from Strossa et al. (2024).

The clamping current limit mentioned in Table 1 comes from the capacitors forming C_IN, and from the H-bridge transistors’ clamping diodes. After the C_IN has been discharged by the crowbar, the current of the excited crowbar inductor L commutes to these clamping diodes.

Generally, the H-bridge cell reverse diodes’ current peak capacity i²t is usually lower than the capacity of the thyristors engaged in the overvoltage protection circuit. The target application of the overvoltage protection does not prefer a very fast discharge in this case; therefore, a moderate current peak stress is preferred here.

If there was thyristor T₁ only without R, differently from Figure 3, then the following equation would describe the circuit: (4) vLt=vCINt, {v_{\rm{L}}}\left( t \right) = {v_{{\rm{CIN}}}}\left( t \right), where t is time (s), V_CIN (t) is the voltage on the capacity C_IN as a function dependent on time t, and v_L (t) is the voltage on the crowbar inductivity L as a function dependent on time t.

The clamping current discharging the C_IN capacity can be defined according to Eq. (4) as: (5) 1C∫iCINt⋅dt=−L⋅diCINtdt, {1 \over C}\int {{i_{{\rm{CIN}}}}\left( t \right) \cdot {\rm{dt}}} = - L \cdot {{{\rm{d}}{{\rm{i}}_{{\rm{CIN}}}}\left( t \right)} \over {{\rm{dt}}}}, where i_CIN (t) is the clamping current discharging the C_IN capacity as a function of time t.

The discharging current can be expressed from Eq. (5) using the Laplace and inverse Laplace transform as: (6) iCINt=VBR⋅CL⋅sintLC {i_{{\rm{CIN}}}}\left( t \right) = {V_{{\rm{BR}}}} \cdot \sqrt {{C \over L}} \cdot {\rm{\;sin\;}}{t \over {\sqrt {LC} }}

The amplitude of the discharging current, expressed as a local maximum of Eq. (6), can be expressed as: (7) iCINt=VBR⋅CL {i_{{\rm{CIN}}}}\left( t \right) = {V_{{\rm{BR}}}} \cdot \sqrt {{C \over L}}

The expression of L = L_MIN2, C = C_IN and i_CIN(t) = I_BRMAX in Eq. (7) returns: (8) LMIN2=CIN⋅VBR2IBRMAX2=4.7⋅10−3⋅30021002=4.23 mH, {L_{{\rm{MIN}}2}} = {{{{\rm{C}}_{{\rm{IN}}}} \cdot V_{{\rm{BR}}}^2} \over {I_{{\rm{BRMAX}}}^2}} = {{4.7 \cdot {{10}^{ - 3}} \cdot {{300}^2}} \over {{{100}^2}}} = 4.23\;{\rm{mH}}, where L_MIN2 is the minimal inductivity (H) to pass the clamping current amplitude limit defined in Table 1, if the crowbar series resistivity is not used (Strossa et al., 2024).

The switching transients generated by the H-bridge transistors can lead to voltage oscillations across the input capacitor C_IN. These rapid fluctuations may occur due to interaction between the wiring and the equivalent series inductance of C_IN, triggered by the fast current commutation between the AC side of the H-bridge and the capacitor during pulse-width modulation.

It is essential to ensure that these oscillations do not cause the current flowing through inductor L to exceed the thyristor’s latching current, as this could result in unintended activation of the crowbar. The slope of the voltage ripple on C_IN during modulation depends on several factors: the amplitude of the switched current in the H-bridge cell, the switching characteristics of the transistors, the parasitic properties of the capacitors forming C_IN and the inductive behaviour of the conductors between the capacitor and the switching elements. The resulting voltage ripple, which reflects the construction of the H-bridge cell, is summarised in Table 1.

The Semikron SKKT 42/08E thyristor, selected for the crowbar overvoltage protection prototype, features a latching current I_thL = 300 mA. To prevent unintended triggering due to current ripple caused by switching transients, the minimum required inductance L_MIN3 can be determined based on the inductive reactance, using the relation expressed in Eq. (2): (9) LMIN3=ΔVSWRIP2⋅π⋅fsw⋅IthL=302⋅π⋅100⋅103⋅300⋅10−3∼160 μH {L_{{\rm{MIN}}3}} = {{\Delta {V_{{\rm{SWRIP}}}}} \over {2 \cdot \pi \cdot {{\rm{f}}_{{\rm{sw}}}} \cdot {I_{{\rm{th}}L}}}} = {{30} \over {2 \cdot \pi \cdot 100 \cdot {{10}^3} \cdot 300 \cdot {{10}^{ - 3}}}}\sim 160\;\mu {\rm{H}}

After evaluating the calculated values of L_MIN1 from Eq. (3), L_MIN2 from Eq. (8) and L_MIN3 from Eq. (9), and taking into account the expected physical dimensions of the corresponding inductors, a crowbar inductor with L = 170 μH was selected. This value satisfies the requirements defined by L_MIN and L_MIN3 only, which lead to the decision to implement a two-stage crowbar protection scheme.

The proposed overvoltage protection design incorporates an initial peak current limitation, achieved by a series connection of inductor L and resistor R, as shown in Figure 3. The time constant of these current-limiting components is tuned to dissipate as much energy as possible during the discharge pulse of the input capacitor.

The energy dissipated on resistor R ensures a fast decrease of the discharging current, which decreases the current stress of the H-bridge free-wheeling diodes, which hold the discharging current after crowbar capacity C_IN is discharged. Additionally, the resistivity R limits the discharging current amplitude, so the inductivity L < L_MIN2 defined by Eq. (8) can be applied.

The resistivity R was set to R = 2.6 Ω, and the maximum discharging current is limited by R as: (10) IBRMAX=VBRR=3002.6∼115 A {I_{{\rm{BRMAX}}}} = {{{V_{{\rm{BR}}}}} \over R} = {{300} \over {2.6}} \sim 115\;{\rm{A}}

The value stated by Eq. (10) is higher than the I_BRMAX stated by Table 1, but Eq. (10) is simplified; it does not take into consideration the impact of the inductivity L, which also limits the amplitude. The 100 A limit stated by Table 1 was finally exceeded.

The first stage switch-on thyristor T₁ only, where resistivity R in series with clamping inductor L limits the clamping current amplitude. After particular deexciting of the inductor L, the resistance R is bypassed by the delayed switched-on thyristor T₂. The time delay was set up empirically within the simulation of the proposed crowbar (Strossa et al., 2024). The second stage thyristor T₂ is approximately 18 ms delayed, and the discharging current falls to zero approximately 40 ms after crowbar intervention. The total inductor deexciting time after T₂ switching-on depends on voltage drop of the conducting devices and the parasitic current loop resistivity. There is no protected application time limit requirement.

The time delay between switching of T₁ and T₂ is set to achieve maximum discharging current I_BRMAX on the second peak of intervention. If a shorter delay was set, the second peak current would exceed the maximum current I_BRMAX required by the application. If a longer delay was set, the resistors forming R resistivity would be exposed to a higher power load, which could impact their short-time overload and change the required power dimensioning.

The discharging circuit can be described by the following equation, after the first stage thyristor T₁ is activated: (11) vCINt=vLt+vRt, {v_{{\rm{CIN}}}}\left( t \right) = {v_{\rm{L}}}\left( t \right) + {v_{\rm{R}}}\left( t \right), where v_R(t) is the crowbar resistivity voltage as a time-dependent function (V). This equation can be changed to: (12) −1C∫iCINt⋅dt=L⋅diCINtdt+R⋅iCINt - {1 \over C}\int {{i_{{\rm{CIN}}}}\left( t \right) \cdot {\rm{dt}}} = L \cdot {{{\rm{d}}{{\rm{i}}_{{\rm{CIN}}}}\left( t \right)} \over {{\rm{dt}}}} + R \cdot {i_{{\rm{CIN}}}}\left( t \right) After the switching on of the second stage T₂, Eq. (12) changes to Eqs (13) and (14). (13) vCINt−t2=vLt−t2, {v_{{\rm{CIN}}}}\left( {t - {t_2}} \right) = {v_{\rm{L}}}\left( {t - {t_2}} \right), where t₂ is the time of T₂ activation(s). (14) −1C∫iCINt−t2⋅dt=L⋅diCINt−t2dt+vCINt2 - {1 \over C}\int {{i_{{\rm{CIN}}}}\left( {t - {t_2}} \right) \cdot {\rm{dt}}} = L \cdot {{{\rm{d}}{{\rm{i}}_{{\rm{CIN}}}}\left( {t - {t_2}} \right)} \over {{\rm{dt}}}} + {v_{{\rm{CIN}}}}\left( {{t_2}} \right)

Afterwards, finding a solution of t from Eq. (14), for I_CIN achieving the local maximum equal to I_BRMAX can lead to finding t₂ in Eq. (11). Furthermore, this is a very complex process, which is difficult for multiple applications of the initial conditions within the Laplace and Inverse Laplace transform. Consequently, the parasitic resistivities of the current loops and the thyristors’ V-A characteristics are taken into consideration in equations, so the empirical setting of time t₂ = 18 ms in the simulations was used to find the ideal value for the built prototype.

The following limiting parameters of the crowbar power devices were determined; the detailed parameters assessment is described below.

The main aspects of the crowbar power dimensioning come from the protected circuit requirements listed in Table 1. The peak anode current of the thyristors T₁ and T₂ is defined by the discharging current stated there. The non-repetitive single pulse current is usually defined for a sinus half-wave, taking 10 ms. The selected thyristor has to be able to pass the i²t thermal energy absorption, so the thyristor selection should take into consideration the length and shape of the discharging current line. The simulation results return the i²t thermal energy integral 88 A₂s, as stated in section 5.1., which is the requirement coming from the predicted discharging current line. The prototype crowbar construction uses the Semikron SKKT 42/08E, which is capable of holding 1000 A amplitude of half-sine current. Thyristors are overdimensioned, but the crowbar is resistant to any unexpected discharging current time prolongation.

The crowbar choke L is air core-based, so there is no risk of saturation. The only current-limiting aspect is the cross-sectional square value of the choke wire.

The crowbar resistor R average power value is low, but the resistor has to be able to hold current up to 100 A for up to 18 ms. The peak power of the resistor is: (15) PRPEAK=R⋅ILMAX2∼2.6⋅1152∼34,4 kW {P_{{\rm{RPEAK}}}} = R \cdot I_{LMAX}^2 \sim 2.6 \cdot {115^2} \sim 34,4\;{\rm{kW}} where P_RPEAK is the peak power of the resistor (W) and I_LMAX is the peak current (A).

The value of I_LMAX from Table 2 should be the same as the I_BRMAX in Table 1. For evaluation of the worst case, the value I_LMAX = 115 A according to Eq. (10) was assumed. But, finally, the value of resistivity R was set up experimentally to pass the current peak equal to 100 A. The current peak comes out slightly higher in the simulation than in the experimental set-up. This is probably because of another parasitic resistance in the current loop, which is not considered in the simulation.

The resistor R power dimensioning needs to pass Eq. (15), which is the peak power for a short time interval. Generally, there are more ways to pass it according to the datasheet ratings. The first way is to calculate the i²t thermal integral and compare it with the datasheet value, if it is available. The second way is to read directly the short-time datasheet voltage or current overload. Finally, it is also possible to calculate the dissipated energy and the rated temperature rise from the thermal capacity.

In the proposed prototype design, the parallel combinations of three resistors rated each for 3 W were used. The capability to operate repetitively in the proposed design was then experimentally verified.

Generally, the values of the parameters stated in Table 2 are interdependent, for example, the resistors’ parameters influence the thyristor requirements. In the case of the proposed prototype, the thyristor parameters were estimated according to the general application requirements stated in Table 1, and the resistor power and resistivity values were stated according to the other parameters.

The proposed crowbar overvoltage protection consists of the following blocks, shown in Figure 4.

Figure 4.

Block diagram of the proposed crowbar overvoltage protection.

The proposed crowbar consisting of T₁ and T₂ thyristors, power resistor R, and inductor L, as depicted in Chapter III, is coupled in parallel directly to the C_IN input capacity of the protected H-bridge cell. The overvoltage evaluation unit observes the H-bridge link capacity voltage incessantly. The overvoltage protection intervenes if the voltage on C_IN exceeds the V_BR value listed in Table 1.

The power supply of the crowbar control circuits is provided by the voltage of the protected H-bridge input capacity. This is the main advantage of the proposed concept because no other auxiliary source of energy is needed. The crowbar protection goes to standby mode every time the voltage of the input capacity C_IN rises from zero, so the crowbar control circuits are active independently of the protected H-bridge control and driving system. So the crowbar protection is ready to react to the overvoltage coming out from the output grid, even if the H-bridge cell control system is in sleep mode.

The energy needed for proper crowbar intervention is stored in the capacity C₁. This capacity is coupled with C_IN via D₁, as depicted in Figure 4. The voltage in C_IN is followed by the voltage of C₁, if it grows or stays in a steady state. If the voltage on the C_IN capacity exceeds the V_BR value, the protection intervenes. The crowbar power circuit discharges the C_IN capacity. The diode D₁ prevents discharging C₁ to C_IN, so the crowbar control circuits are powered supplied from C₁ during the generation of the switching driving sequence for both the crowbar thyristors.

The overvoltage detection mechanism in the proposed crowbar control circuit operates by comparing the voltage measured across capacitor C₁ with a reference level defined by a Zener diode Z_D1. The corresponding schematic is shown in Figure 5.

Figure 5.

Simplified proposed crowbar overvoltage evaluation control circuit (Strossa et al., 2024).

The reference voltage for the comparator is generated by the Zener diode Z_D1. The observed input voltage is scaled by the voltage divider formed by the R₁ and R₂ resistors. Transistor Q₂ forms the comparator together with Q₁. The comparative value defined by the breakdown voltage listed in Table 1 is set up by R₁, R₂, R₄, and R₆. The hysteresis band of the comparator is defined by these resistors, mainly by R₆.

When the voltage on R₂ exceeds the Zener voltage of Z_D1, the gate-source voltage of Q₂ can begin rising. When this voltage exceeds the Q₂ threshold voltage, transistor Q₂ goes into a switched-on state. That causes the switching-on of Q₁, which forms positive feedback for Q₂. The subsequent switching-on of Q₁ accelerates the switching-on process of Q₂ (Strossa et al., 2024).

The output signal Trig. 1 serves as the input for the driver of the first-stage thyristor T₁, as well as for the delay unit that initiates the driver of the second-stage thyristor T₂. Additionally, it functions as the enable signal for the constant current source that powers the LED within the optocoupled trip signal output.

The duration of the driving pulse is determined by the hysteresis band of the comparator, since transistors Q₁ and Q₂, which are normally in the off-state, remain conducting until the voltage across capacitor C₁. Drops below the comparative value.

Generally, the overvoltage evaluation unit depicted in Figure 5 is a comparator based on discrete electronic components, power supplied directly from the protected H-bridge voltage system. This provides the function with no need for any auxiliary power supply for the crowbar control circuit. This comparator compares the link capacity C_IN voltage with the reference breaking value. The first stage thyristor T₁ driver is triggered directly from this comparator. The second stage thyristor T₂ driver is triggered delayed via a low-pass filter. Thyristor drivers used in the proposed concept do not provide sufficient hysteresis with reference to their input signal; this is because of their simple design, as described in Section 4.5. So the driver triggering signals have to be sufficiently steep on their edges themselves.

This is passed with the trigger signal Trig. 1, which is the output of the comparator depicted in Figure 5. A similar comparator integrated behind the low-pass filter used for thyristor T₂ driver was used as a signal shaper to pass this condition for driving thyristor T₂, as depicted in Figure 6.

Figure 6.

Simplified proposed crowbar second-stage triggering control circuit.

The trigger signal Trig. 1, which is the output of the block depicted in Figure 5, is semigrounded in the active state via Z_D1. This physical signal implementation is negated via Q₅ to V_CC in the active state, as depicted in Figure 6. Z_D4, commonly with R₁₇, forms the reference voltage for the comparator formed by Q₆ and Q₇. Resistors R₁₅, R₁₆, R_18, and R₁₉ define comparator hysteresis in steady state. The parallel combination of these resistors and capacity C₃ defines the delay between Trig. 1 signal and Trig. 2 signal, which is used for triggering the second-stage thyristor T₂.

The cathode of thyristor T₁ is connected to the same ground potential that serves as the signal ground within the control circuit, as illustrated in Figure 4. This arrangement simplifies the driver design. Thyristor T₂, on the other side, has a floating cathode. However, once T₁ is triggered, the cathode of T₂ becomes grounded through T₁. Since T₂ is always activated with a delay related to T₁, both driver circuits are designed to operate with a common ground reference. A simplified schematic of the driver is shown in Figure 7.

Figure 7.

Simplified crowbar thyristor driver (Strossa et al., 2024).

The drivers are controlled by the signal from the trigger. T₁ is triggered directly from the output Trig. 1 depicted in Figure 5. T₂ is switched delayed, so the related driver is triggered by the output of the independent comparator, which is similar to that one in Figure 5. This comparator is triggered by the signal Trig. 1 in Figure 5 via a low-pass filter formed by R₁₅, R_16, and C₃ in Figure 6, which ensures the time delay.

Each driver contains a transistor, which switches the pulse to the thyristor gate, as depicted in Figure 7. The length of the triggering signal defines the length of the driving signal, and it is set up by the hysteresis band of the overvoltage comparator.

Capacity C₄ in Figure 7 bypasses R₁₀ at the beginning of the switching pulse, which provides the initial gate current peak.

The proposed crowbar control circuit is equipped with an isolated trigger output, which can be optionally used for signalling to the control system of the H-bridge protected by the proposed crowbar. This signal can be used for sending information about the crowbar intervention to the microcontroller-based control system.

The simplified circuit diagram of the optocoupled unit is depicted in Figure 8. The group of Zener diode Z_D6, resistors R₂₃ and transistor Q₈ forms the constant current source generating the current for the optocoupler LED diode. This constant current generator is activated by signal Trig. 1. Transistor Q₈ operates in active mode, not as a switch, so it dissipates much of the energy and its cooling is designed for an intermittent load. The resistor R₂₅ is used to decrease the temperature load of transistor Q₈, causing the power dissipation of the constant current source for the optocoupler LED to be divided mainly between Q₈ and R₂₅.

Figure 8.

Simplified optocoupled trigger output.

The proposed crowbar solution was simulated in a Spice environment. The following results were obtained: The delay of T₂ switching-on was experimentally set to approximately 18 ms. The proposed crowbar solution including thyristor thermal energy integral was simulated in a Spice environment, as is depicted in Figure 9.

Figure 9.

Spice simulation of proposed crowbar intervention, H-bridge cell input capacity voltage V_CIN (V), 50 V/div, clamping input capacity discharging current I_L (A), 18 A/div and thermal integral i²t (A²s), 25 A²s/div, timebase 50 ms/div.

The experimental prototype of the crowbar overvoltage protection was built using Semikron SKKT 42/08E thyristors. For the input capacitor C_IN, a TDK manufactured component with a nominal capacitance of 4.7 mF was selected.

The experimental set-up is depicted in Figure 10. The constructed prototype was tested under the following conditions: The protected H-bridge cell was kept deactivated, while the input capacitor was gradually charged from a voltage source through a 10 kΩ resistor. This resistor served to decouple the charging source from the crowbar circuit during its activation. Once the voltage exceeded 300 V—corresponding to the breakdown threshold specified in Table 1—the crowbar circuit responded successfully, as depicted in Figures 11 and 12.

Figure 10.

Experimental set-up (Strossa et al., 2024).

Figure 11.

Experimental waveforms after crowbar intervention of H-bridge (Strossa et al., 2024), input capacity voltage V_CIN (V), 100 V/div and crowbar clamping current I_L (A), 50 A/div, time base 10 ms/div.

Figure 12.

Experimental waveforms after crowbar intervention of H-bridge (Strossa et al., 2024), input capacity voltage V_CIN (V), 100 V/div and crowbar clamping current I_L (A), 50 A/div, time base 250 μs/div, detailed current rising is scoped.

The prototype also includes an optocoupled trigger output designed to transmit information about the overvoltage protection event from the crowbar control board to the converter’s control system. The trigger signal V_{TRIG_OUT} (V), originating from the optocoupler’s secondary side, operates with an open-collector output connected to a pull-up resistor. This signal is illustrated in Figure 13.

Figure 13.

Experimental waveforms after crowbar intervention of H-bridge (Strossa et al., 2024), input capacity voltage V_CIN (V), 100 V/div, crowbar clamping current I_L (A), 50 A/div and trip voltage on the secondary side of optocoupler V_TRIP (V), 10 V/div, time base 50 ms/div, trip signal observed.