Nowadays, AC railway electrification systems are becoming increasingly preferred (Steimel, 2014). The main advantage of AC infrastructure is its higher power density and its ability to integrate with smart grids under the Industry 4.0 concept through advanced traction substations (TSSs).
One of the most common approaches in newly developed railway systems is the use of an uninterrupted contact wire, which requires TSSs based on semiconductor technology.
The current state of TSS topologies can be roughly classified into two groups: those that utilise power electronics and those that do not. A comprehensive list of topology descriptions and comparisons is provided in Straka et al. (2021).
We introduce a novel solution called the advanced rail balancer (ARB), which has shown promising results. The ARB is designed for the 25 kV/50 Hz traction catenary system used in Central and Eastern Europe. Its configuration is shown in Figure 1 and includes a three-phase TSS transformer for voltage adjustment and galvanic isolation, an electronic balancer and a phase-shifting device. The core of the system is the electronic balancer, which provides full power symmetrisation. In addition to this primary function, the device also compensates for reactive power and filters high-harmonic currents. The phase-shifting device adjusts the voltage output vector to enable coordination with nearby TSSs and eliminates the need for neutral sections (voltage-free zones). Moreover, the system offers limited functionality in the event of a failure of any electronic component, which is advantageous in terms of TSS reliability and overall cost compared to TSSs using static frequency converters (SFCs). Both solutions (ARB and SFC) are described and compared in more detail in Straka et al. (2021).

Topology of a TSS with the ARB. ARB, advanced rail balancer; PSD, phase shifting device; TSS, traction substation.
The presented electronic balancer unit of ARB contains a multilevel cascaded H-bridge (CHB) converter, which enhances the quality of the output voltage and supports higher operating voltage—key advantages of multilevel converters. CHB converters are widely used in applications such as active filters (Aguilera et al., 2024; Alonso Orcajo et al., 2020; Wang and Liu, 2019), photovoltaic converters (Pastor and Dudrik, 2015; Wang et al., 2019; Yu et al., 2017), static compensators (Zhang et al., 2020) or solid-state transformers (Chai, 2018).
The state-of-the-art research in the field of CHB converter control is focused mainly on single-phase systems (He et al., 2023; Ma et al., 2020; Wang et al., 2020; Zhao and Chen, 2022), modulation techniques (Alcaide et al., 2021; Lamb et al., 2018; Marquez et al., 2020), current control loops (Ma et al., 2020; Tafti et al., 2018), voltage control loops (Deng et al., 2023) and the currently popular model predictive control algorithms (Nasiri et al., 2019).
From a control perspective, the ARB functions as a shunt active power filter (SAPF), symmetrising and filtering the railway load current. The popular SAPF current control methods are variable switching frequency methods, such as direct power control (Ouchen et al., 2021), finite control set-model predictive control (FCS-MPC, Ferreira et al., 2018; Khan et al., 2020) and hysteresis current control (Abdel-Aziz et al., 2024; Chavali et al., 2022), and fixed switching frequency control methods, which are more suitable for high power applications, using synchronous reference frame control (Alonso Orcajo et al., 2020; Wang and Liu, 2019), p-q theory (Biyya et al., 2023), wavelets and adaptive filtering (Fei et al., 2023; Moradi and Pichan, 2022) methods and proportional resonant (PR) controllers (Santiprapan et al., 2024).
The presented control strategy for the CHB converter, applied in the ARB system, incorporates a power symmetrisation method based on Steinmetz’s symmetrising circuit. It also includes a sliding discreet Fourier transformation (SDFT; Park, 2017) for fundamental load current harmonic estimation, dual second-order generalised integrator phase-locked loop (DSOGI-PLL) for grid synchronisation (He et al., 2018) and a novel discrete-time state-space algorithm for PR current controllers in the ARB. This control scheme is designed with respect to the transient dynamics of the traction catenary system, while minimising undesirable effects on the distribution grid. This paper presents individual current control of ARB branches based on PR controllers, which ensures sufficiently fast and accurate per-phase current control in the stationary reference frame (with high reliability, simplicity and immunity to interference), and furthermore allows operation in the event of an ARB branch fault. However, control system latency, caused by the low switching frequency and the digital implementation of the resonant part of the PR controllers, can significantly degrade control performance or even lead to instability (Husev et al., 2020; Yepes et al., 2010). To address this, we have developed a new resonant controller algorithm with latency compensation, precise numerical implementation and orthogonal output structure, enabling sinusoidal output limiting and anti-windup protection (Lezana et al., 2007).
In the following section, the proposed control algorithm is described in more detail. It consists of multiple parts, such as Steinmetz’s equations for TSS power balancing, feedforward voltage calculation, load active and reactive power evaluation, DC-link voltage control and inner-loop current control. The DC-link voltage and current control are implemented separately for each branch, as shown in Figure 2.

Block diagram of the proposed control scheme. PI, proportional integration; SOGI-PLL, second-order generalized integrator phase-locked loop.
Synchronisation with the three-phase grid voltage must provide fast and accurate estimation of the voltage vector (i.e. voltage vector amplitude Um, voltage vector angle ϑu12, and grid frequency ω). The DSOGI-PLL synchronisation method has been chosen for its good immunity to input signal noise and disturbances. This method is well known from Suul et al. (2012).
To calculate the value of the compensation and symmetrisation currents accurately, it is necessary to evaluate the phasor of the single-phase current flowing through the TSS to the traction catenary Icat_SDFT_I and Icat_SDFT_R. The evaluation of the current phasor is based on the following SDFT Eqs (1) and (2):
Defining symmetrisation and reactive power compensation of a single-phase load connected to the TSS catenary is based on Steinmetz’s equivalent circuit and explained by a phasor diagram in Figure 3. The balancing current calculation depends on the catenary current amplitude and its phase shift relative to the grid voltage [Eqs (4) and (5)]. Eqs (6)–(8) describe ARB reactive power compensating and balancing currents of individual CHB branches based on the catenary current. The Icat_m is the catenary current magnitude, ϑu12 is the voltage vector angle (line to line Ug12 voltage angle) and ϑi is the current vector angle of the catenary load. The calculated currents iCHB12, iCHB23 and iCHB31 are used as a fundamental harmonic current reference for the ARB inner current loop.

Steinmetz’s symmetrising circuit and corresponding phasor diagram illustrating the function of the electronic balancer.
The feedforward calculation is based on a simplified electrical steady-state model of the device: a series connection of the grid voltage, filter inductance LCHB with the effect of filter resistance neglected and converter voltage. The resulting feedforward converter voltages uff12, uff23, uff31, depending on the grid voltage Um, ϑu12, frequency ω and catenary current Icat_I, Icat_R are presented in Eqs (9)–(11). The filter inductance voltage drop is shifted by
The DC-link voltages and CHB currents of each ARB branch are controlled individually. The DC-link voltage control provides an approximately constant sum of DC-link voltages of floating capacitors of all cascaded-connected H-bridges per CHB phase (uDC_w is the total reference voltage of the whole CHB branch). The DC-link capacitor’s energy covers the power losses of the converter and the fluctuation of reactive power. Since the power losses are low, fast dynamics of the DC-link voltage controller are not required. Therefore, a proportional integral (PI) voltage controller with a dominant integral component was chosen. The output signal of the voltage controller is the required current I12_Δu, which is in phase with the grid voltage (active current). This current is summed with the required symmetrising current from Steinmetz’s Eqs (6)–(8), and with the required higher-order harmonics filtration current iCHB12_fil. This creates the total reference current of the CHB branch iCHB12_w.
The required catenary filtration current icat_fil is calculated as the difference between the actual catenary current icat and the fundamental harmonic of the catenary current icat(1st) estimated by SDFT. The required filtration current is equally divided into two parallel branches: (1) compensation branch CHB12 iCHB12_fil = −1/2 icat_fil and (2) the entire symmetrisation branch, consisting of a series connection of CHB23 and CHB31 branches iCHB23_fil = iCHB31_fil = 1/2 icat_fil. However, the harmonic current distribution in parallel branches can be freely selected, for example, with respect to branch power losses.
The total current reference iCHB12_w is used as a reference for a proportional controller and several advanced PR controllers regulating the fundamental harmonic component (50 Hz) and higher-order harmonics (150 Hz, 250 Hz, 350 Hz and 450 Hz). The PR controller generates a signal uPR12, which is summed in the following step with a feedforward value, uff12 Eq. (9), and a harmonics filtration component, also denoted as uhf12. The result is the converter modulation signal for the CHB 1 kHz phase shift pulse width modulation (PS-PWM) modulator, including the DC-link balancing algorithm. Low switching and sampling frequency, large control latency, and the requirement to eliminate higher-order current harmonics up to 450 Hz are the biggest challenges in ARB control, which led to the development of the advanced R controller algorithm presented in Section 3.
In the given application, a multilevel voltage source inverter (VSI) is used in combination with PS-PWM. To better understand the delays introduced into the system, see Figure 4. The base sampling frequency of the system is 8 kHz (sampling is at the top and bottom of all phase-shifted PWM timers). However, the compare register of each H-bridge is only changed at its top or bottom of the PWM timer (two times per PWM frequency, i.e. 2 kHz). It creates the variable control delay of individual inverters.

Timeline visualising control and modulation delay of the system.
This means that, at a given instant, it takes 1 sample time for the measured values to be processed and set as the active output voltage reference for the first converter, 2 sample times for second converter up to 4 sample times for the fourth converter. This reference remains active for a duration of four samples before being replaced by a new value.
The latency in the system that needs to be compensated corresponds to one sample delay due to computation, plus half of the time during which the reference value is active. In this case, the total compensated delay is equivalent to three sampling steps. This value is primarily influenced by the number of levels in the multilevel VSI used.
To model the real PS-PWM latency and demonstrate its effect, discrete state-space equations have been derived for the PS-PWM:
A method for balancing individual cells of CHB based on energy formula at the modulation signal level was used (Blahnik et al., 2018). The PS-PWM is modulator implemented in an Altera/Intel Cyclone III, FPGA.
This section describes a new R controller algorithm for control of ARB currents fundamental and higher order harmonics with improved numerical properties based on analytical exact discretisation and control latency compensation. The implementation of the R controller has a significant impact on control quality, especially with large sample times or control latencies (Husev et al., 2020). In contrast to the PI controller, the PR controller can directly regulate AC signals without steady-state errors. The PR controller consists of a proportional part and a resonant part:
The digital implementation of the R controller can be derived by transforming the transfer function (13) into a Laplace equation:
Eq. (14) can be reformulated into a state-space equation using the general formula:
From Eqs (14) and (15), we can obtain the state-space equations of the R controller:
The matrix A can be expressed as follows:
By using the exact discretisation formula for matrix A and sampling time Δt,
We get the following analytical solution:
The result is an orthonormal (rotational) matrix (Ad−1 = AdT).
We can use the exact discretisation formula for the B matrix:
So:
Resulted R controller equations are:
The control algorithm’s latency can reduce the efficiency of the R or even make it unstable. However, the R controller in the state-space form can be easily extended with feedforward latency compensation included in the C matrix. The original output matrix contains only the selection operation of the first state (xα(k)). If we define the control latency as Δtlat, we can calculate feedforward latency compensation by multiplying the original C matrix by orthogonal rotational matrix as:
To completely eliminate latency effect on R controller, the direct link between control error and the controller output (D matrix in state space model) behaving like a proportional controller can be calculated according to Eq. (25). This component can usually be neglected when PR controller is used due to the low impact to the complete proportional gain.
The complete equations with latency compensation of advanced PR controller are:
For comparison purposes, three implementation alternatives were selected: the Basic R controller Eqs (27) and (29) as an effective common R implementation, the R controller based on Tustin discretisation (Yepes et al., 2010) Eq. (30), and the first-order hold (FOH) discretisation (Yepes et al., 2010) Eq. (31).
The Basic R controller implementation is based on modification of forward Euler discretisation Eqs (27) and (28):
A similar result can be achieved when the Eq. (29) is calculated first and its result xβ(k) is immediately used for the calculation of the R output y(k) Eq. (27) instead of xβ(k−1). This Basic algorithm of the R controller is computationally very effective (especially with variable frequency), suitable for many applications and works with a lower sampling frequency compared to forward Euler. However, for a high-power converter with low switching frequency (i.e. low sampling frequency and large control delays) which contains R controllers for higher harmonics, this R controller implementation is still insufficient and even unstable. This fact is demonstrated in later section see Figure 14.
The Tustin and FOH R controller implementations are in Eqs (30) and (31), respectively. Both the Basic and the Tustin discretisation methods shift the resonant frequency, each in the opposite direction (Figure 5). In contrast, the proposed advanced R and the FOH R controllers yield identical results, which perfectly match the ideal R controller characteristics.

Influence of different discretisation techniques on R controller Bode’s characteristics. FOH, first-order hold.
The influence of the control latency on the R control part of the system in the frequency domain is shown in Figure 6. The figure illustrates the effect of delay introduced by both the computation and the modulator (see Section 2.5). This delay causes a significant phase shift of uncompensated R controllers. The uncompensated R controller shown in the figure uses the FOH discretisation method. The similar results would be obtained with an uncompensated advanced R controller. The ideal frequency characteristic, used as a reference, corresponds to a continuous-time R controller without latency. The advanced R controller with delay compensation closely follows the ideal curve up to the resonant frequency, exhibiting only a small, negligible phase error at heavily damped frequencies.

Bode’s characteristics of discrete R controllers with ARB control system latency and ideal characteristic of continuous R controller without latency. ARB, advanced rail balancer; FOH, first-order hold.
The main advantage of the proposed controller over FOH lies in its simple implementation and effective control latency compensation. Furthermore, decomposition of the R controller output into two orthogonal (complex) components [xα, xβ] allows determination of amplitude
On the contrary, the computational effort required by the advanced R controller compared to the forward Euler or its Basic modification involves four additional operations (multiplications or additions) and three more operations for delay compensation with constant resonant frequency (constant R coefficients).
The schematic diagram of the laboratory prototype (see Figure 7) corresponds to the one shown in Figure 1, except the missing phase shifting device (PSD). All of the measured values, used for control, are marked in red. The system parameters are listed in Table 1. To verify the proposed control algorithm, a down-scaled laboratory model of the ARB was built (see photo in Figure 8). Each branch of the balancer unit contains four CHBs, each equipped with a series inductor LCHB. All control algorithms are executed on a Texas Instruments TMS320F28335 microcontroller. The PS-PWM is implemented in an Altera/Intel Cyclone III FPGA, which forms part of the multi-level converter (MLC) interface controller. The PS-PWM algorithm uses two self-inverted sinusoidal reference signals, one for each half of the H-bridge. Each bridge is modulated using its own carrier signal, phase-shifted by π/4 relative to the others. Interrupt handling and analog-to-digital conversion ADC are synchronised with the rising and falling edges of the 1 kHz carrier waveform.

Scheme of the laboratory model of ARB. ARB, advanced rail balancer.

Laboratory prototype for experimental validation.
Parameters of the experimental model.
| Parameter | Description | Value |
|---|---|---|
| Ug12, Ug23, Ug31 | Line-line voltage | 400 VRMS/50 Hz |
| LCHB | Filtration inductor | 4 mH |
| CCHB | DC-link capacitor | 2.5 mF |
| UDC | DC-link voltage | 180 V |
| ΣUDC | DC-link voltage summation | 4 × 180 V = 720 V |
| fPWM | PWM frequency | 1 kHz |
| tdt | Dead time duration | 1 µs |
| PI: KP; TI | PI gain and time constant | 0.04, 0.2 s |
| PR(1): KP; KR | PR gain and time constant | 2; 200 |
| A load | RL load parameters | 16 Ω, 20 mH (P(1) = 8.66 kW, Q(1) = 3.4 kVAr) |
| B load | Diode rectifier load parameters | AC: 10 mH; DC: 16 Ω, 80 mH (P(1) = 6.7 kW, Q(1) = 4.3 kVAr) |
PI, proportional integration; PR, proportional resonation; PWM, pulse width modulation.
The load of the TSS is represented as: (A) a pure RL load (Figures 9–14) or (B) a single-phase diode bridge rectifier with RL load (Figures 15–17). The load was dimensioned to comply with the limitations of the laboratory stand’s circuit breaker and to match the impedance scaling requirements.

RL load, ARB off, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ug12 [250 V/div], green Icat [10 A/div] (aligned with Ig1). ARB, advanced rail balancer; THD, total harmonic distortion.

RL load, ARB—balancing ON + harmonics filtration OFF, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ug12 [250 V/div], green Icat [10A/div]. ARB, advanced rail balancer; THD, total harmonic distortion.

RL load, ARB—balancing ON + harmonics filtration OFF, blue UCHB12 [250 V/div], cyan ICHB12 [10 A/div], purple ICHB23 [10 A/div], green ICHB31 [10 A/div]. ARB, advanced rail balancer.

RL load, ARB—balancing ON + harmonics filtration OFF, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ig2 [10 A/div], green Ig3 [10 A/div]. ARB, advanced rail balancer; THD, total harmonic distortion.

RL load, ARB—balancing ON + harmonics filtration ON, common R controllers, blue Ug1 [250 V/div], cyan ICHB12 [10 A/div], purple ICHB23 [10 A/div], green ICHB31 [10 A/div]. ARB, advanced rail balancer.

RL load, ARB—balancing ON + harmonics filtration ON, advanced R controllers, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ig2 [10 A/div], green Ig3 [10 A/div]. ARB, advanced rail balancer; THD, total harmonic distortion.

Load: Diode rectifier with RL load, ARB off, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ug12 [250 V/div], green Icat [10 A/div] (aligned with Ig1). ARB, advanced rail balancer; THD, total harmonic distortion.

Load: Diode rectifier with RL load, ARB—balancing ON + harmonics filtration ON with advanced R controllers, blue UCHB12 [250 V/div], cyan ICHB12 [10 A/div], purple ICHB23 [10 A/div], green ICHB31 [10 A/div]. ARB, advanced rail balancer.

Load: Diode rectifier with RL load, ARB—balancing ON + harmonics filtration ON with advanced R controllers, blue Ug1 [250 V/div], cyan Ig1 [10 A/div], purple Ig2 [10 A/div], green Ig3 [10 A/div]. ARB, advanced rail balancer; THD, total harmonic distortion.
The quality of ARB control is quantitatively evaluated using the total harmonic distortion (THD), defined in Eq. (32), and by symmetrical component analysis of all grid current and voltage waveforms.
The positive and negative sequence components of the input current waveform are calculated using the Fortescue transformation. The negative sequence is then expressed as a percentage of the positive sequence.
The AC RL load (P(1) = 8.66 kW, Q(1) = 3.4 kVAr) is used for testing. Figure 9 shows the operation of the TSS without ARB functionality. In this case, the catenary current Icat equals the grid current Ig1, while Ig2 = −Ig1 and Ig3 = 0 A. This configuration results in the negative sequence component being 100% of the positive sequence component. The grid current is unbalanced and phase-shifted—Ig1 leads the grid phase voltage Ug1, by 8.5°, indicating a capacitive character relative to the grid voltage, in contrast to the expected inductive character with respect to the catenary voltage Ug12.
Figure 10 shows the same RL load, but with ARB balancing enabled, excluding harmonic current filtration. While the catenary current Icat remains unchanged, the amplitude and phase shift of Ig1 relative to Ug1 are reduced. However, significant harmonic distortion remains in the grid current, primarily caused by the ARB itself, particularly due to dead times and voltage drops across the IGBTs.
Figure 11 displays the internal ARB symmetrising currents ICHB without harmonics filtration, along with the 9-level output voltage UCHB12 of the corresponding ARB branch during the symmetrisation process. The resulting grid currents are presented in Figure 12. The currents are successfully symmetrised, and the negative sequence component is reduced to 1.15%. Nevertheless, the grid currents still contain prominent odd-order harmonics (3rd, 5th, 7th and 9th).
Figure 13 illustrates the performance of a conventional R controller implemented using the basic discretisation method as shown in Eqs (27) and (29), and higher-order harmonics filtration. This controller exhibits divergent behaviour, especially at higher resonant frequencies, due to the ARB’s control delay, large sampling time and low switching frequency. It is caused by a large basic R numerical error and uncompensated control delay (see Section 3.4).
In contrast, the control employing the proposed advanced R controller with delay compensation demonstrates great performance even in harmonic current filtration, as shown in Figure 14.
The diode bridge rectifier with an RL load (P(1) = 6.7 kW, Q(1) = 4.3 kVAr) is used to simulate a non-linear and unbalanced load (similar to older types of locomotives). Figure 15 shows the operation of the TSS without ARB functionality. In this case, the catenary current Icat equals the grid current Ig1, current Ig2 = −Ig1 and Ig3 = 0 A. The load introduces significant harmonic distortion, causes a phase shift and results in unbalanced current distribution.
Figure 16 presents the internal ARB (CHB) branch currents during operation with both balancing and harmonics filtration active. Approximately 50% of the harmonic content of the load current is filtered by the CHB12 branch (ICHB12), and the remaining 50% is handled by the CHB23 and CHB31 branches (ICHB23, ICHB31).
The final grid currents are shown in Figure 17. The currents are balanced and exhibit no phase shift relative to the respective grid phase voltages, with no significant harmonic distortion. Minor current spikes are visible during diode rectifier commutation events, affecting only Ig1 and Ig2, which is typical for this type of load. The further current spike reduction is limited by the Gibbs phenomenon together with the maximum order of harmonic filtration (up to 9th), which is constrained by the switching frequency of the converter, sampling frequency, DC-link voltage and size of filtering inductance.
This paper presents the ARB designed for next-generation TSSs, including its control algorithm based on a novel advanced resonant controller. The proposed ARB, based on a CHB converter topology, is validated experimentally as presented in this paper. The presented ARB solution addresses multiple challenges:
Symmetrisation of the load current supplied from the distribution power grid.
Compensation of reactive power generated by railway vehicles.
Active filtering of higher-order (non-fundamental) current harmonics.
Elimination of the resonant frequency shifts typically introduced by discretisation and large sampling times.
Compensation of latency in the control/resonant system caused by sampling and modulation.
The proposed phase-by-phase current control algorithm employs a new resonant controller design derived from an analytical solution of exact discretisation, which inherently preserves the desired resonant frequency. This structure enables direct latency compensation and low computational burden, making it more suitable for low switching frequency applications. Additionally, the orthogonal structure of the controller’s output signals allows simple extension with sinusoidal saturation (anti-windup) protection or using results for feedforward calculations.
Experimental results confirm the efficiency of the proposed controller, demonstrating great performance in high-order harmonics filtration, even with a significant control delay. Compared to a traditional implementation, the proposed algorithm demonstrates great accuracy and robustness, confirming its suitability for a wide range of practical applications.