Performance investigation of non-volatile memories for energy-efficient on-chip L2 caches Cover

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Performance investigation of non-volatile memories for energy-efficient on-chip L2 caches

Journal of Electrical Engineering

Volume 77 (2026): Issue 1 (February 2026)

By: Inderjit Singh, Balwinder Raj, Mamta Khosla and Tajinder Kaur

Open Access

|Feb 2026

Authors

Inderjit Singh

National Institute of Technology, Jalandhar, India

Professional Services, Cotiviti Pvt. Ltd., Mohali, India

Balwinder Raj

rajb@nitj.ac.in

National Institute of Technology, Jalandhar, India

Mamta Khosla

National Institute of Technology, Jalandhar, India

Tajinder Kaur

SGTB Khalsa College, Sri Anandpur Sahib, India

DOI: https://doi.org/10.2478/jee-2026-0002 | Journal eISSN: 1339-309X | Journal ISSN: 1335-3632

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Language: English

Page range: 10 - 20

Submitted on: Oct 20, 2025

|

Published on: Feb 18, 2026

Published by: Slovak University of Technology in Bratislava

In partnership with: Paradigm Publishing Services

Publication frequency: 6 issues per year

Keywords:

non-volatile caches,

low power cache,

Related subjects:

Introductions and overviews,

Engineering, other

© 2026 Inderjit Singh, Balwinder Raj, Mamta Khosla, Tajinder Kaur, published by Slovak University of Technology in Bratislava
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

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