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Design and Performance Testing of a Simulation Model for Time-Triggered Ethernet Cover

Design and Performance Testing of a Simulation Model for Time-Triggered Ethernet

By: Bidong Duan and  Jing Cheng  
Open Access
|Mar 2024

Authors

Bidong Duan

1145597333@qq.com

School of Computer Science and Engineering Xi’an Technological University, Xi’an, China

Jing Cheng

chengjing@xatu.edu.cn

School of Computer Science and Engineering Xi’an Technological University, Xi’an, China
Language: English
Page range: 57 - 66
Published on: Mar 15, 2024
Published by: Xi’an Technological University
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year

© 2024 Bidong Duan, Jing Cheng, published by Xi’an Technological University
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.