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A Circuit Principle and Simulation Test for Negative Group Delay Cover
By: Han Shen and  Zhongsheng Wang  
Open Access
|May 2023

Figures & Tables

Figure 1.

Experimental schematic diagram of negative group delay and the pulse relationship on the time axis
Experimental schematic diagram of negative group delay and the pulse relationship on the time axis

Figure 2.

A first-order RC circuits with positive group delay
A first-order RC circuits with positive group delay

Figure 3.

Simulation effect of first-order RC circuits with positive group delay
Simulation effect of first-order RC circuits with positive group delay

Figure 4.

A first-order RC circuits with negative group delay
A first-order RC circuits with negative group delay

Figure 5.

Simulation effect of first-order RC circuits with negative group delay
Simulation effect of first-order RC circuits with negative group delay

Figure 6.

A first-order filter for modulating the input pulse
A first-order filter for modulating the input pulse

Figure 7.

Simulation results of first-order filter modulating rectangular pulse
Simulation results of first-order filter modulating rectangular pulse

Figure 8.

The electronic circuit realizing the negative group delay phenomenon
The electronic circuit realizing the negative group delay phenomenon

Figure 9.

Second-order Bessel filter
Second-order Bessel filter

Figure 10.

Negative group delay electronic circuit
Negative group delay electronic circuit

Figure 11.

Electronic route built in simulation software
Electronic route built in simulation software

Figure 12.

Simulation results of negative group delay phenomenon
Simulation results of negative group delay phenomenon

Figure 13.

The variation of delay time with the number of circuits under different Bessel filters numbers
The variation of delay time with the number of circuits under different Bessel filters numbers

Figure 14.

Amplitude response varies with the number of circuits under different Bessel filters numbers
Amplitude response varies with the number of circuits under different Bessel filters numbers

Figure 15.

The change of negative delay time with the number of Bessel filters under different number of negative group delay circuits
The change of negative delay time with the number of Bessel filters under different number of negative group delay circuits

Figure 16.

The amplitude response varies with the number of Bessel filters under different number of negative group delay circuits
The amplitude response varies with the number of Bessel filters under different number of negative group delay circuits

Figure 17.

LED simulation results
LED simulation results

Simulation results of adjusting the ratio of the number of bessel filters and negative group delay circuits

BFNGDNDT/msIPP/VOPP/VAMP
212142.5772.6851.042
224272.5772.811.090
236152.5773.0071.167
248032.5773.2151.248
312052.6772.7541.029
324792.6772.8371.060
336152.6772.9461.101
348212.6773.0531.140
351027
361164
412562.9032.9681.022
424622.9033.0361.046
437012.9033.1161.073
448892.0933.1871.098
451068
461099
471294
512053.2293.2881.018
524623.2293.3511.038
537523.2293.4321.063
549063.2293.481.078
551050
561205
571378
612223.6523.7091.016
624273.6523.7671.031
637013.6523.8291.048
649403.6523.9021.068
651022
661265
671425
712394.1794.2361.014
724444.1794.2951.028
737184.1794.3581.043
748894.1794.461.067
75933
761134
771283
812054.8274.8861.012
824444.8274.9461.027
836844.8275.0081.037
848554.8275.0641.049
851004
861199
871283
912395.6185.6781.011
924445.6185.741.022
936155.6185.8031.033
948895.6185.8721.045
951060
961186
971345
1012516.5036.5651.010
1024746.5036.631.020
1036696.5036.6971.030
1048656.5036.7621.040
1051088
1061199
1071381

LED simulation results conversion

PortTime CodeUnit Conversion/msTime Delay/ms
Input06:036050.000
Output105:495816.667-233.333
Output205:315516.667-533.333
Language: English
Page range: 46 - 57
Published on: May 26, 2023
Published by: Xi’an Technological University
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year

© 2023 Han Shen, Zhongsheng Wang, published by Xi’an Technological University
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.