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Design of Low Power Carry Skip Adder Using Dtcmos Cover

Design of Low Power Carry Skip Adder Using Dtcmos

International Journal on Smart Sensing and Intelligent Systems
Volume 10 (2017): Issue 5 (January 2017)
By: T.R. Dinesh Kumar,  K. Mohana Sundaram,  M. Anto Bennet,  R. Aruna,  B. Meena and  M. Mohanapriya  
Open Access
|Sep 2017

Authors

T.R. Dinesh Kumar

Faculty of Electronics and Communication Engineering,Vel Tech, Chennai, India

K. Mohana Sundaram

Faculty of Electrical and Electronics Engineering,Vel Tech Multitech Dr. Rangarajan Dr. Sakunthala Engineering College, Chennai, India

M. Anto Bennet

Faculty of Electronics and Communication Engineering,Vel Tech, Chennai, India

R. Aruna

arunaraja95@gmail.com

UG Student of Electronics and Communication Engineering,Vel Tech, Chennai, India

B. Meena

UG Student of Electronics and Communication Engineering,Vel Tech, Chennai, India

M. Mohanapriya

UG Student of Electronics and Communication Engineering,Vel Tech, Chennai, India
DOI: https://doi.org/10.21307/ijssis-2017-252 | Journal eISSN: 1178-5608
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Language: English
Page range: 284 - 294
Submitted on: May 27, 2017
|
Accepted on: Jun 15, 2017
|
Published on: Sep 1, 2017
Published by: Professor Subhas Chandra Mukhopadhyay
In partnership with: Paradigm Publishing Services
Publication frequency: 1 issue per year
Keywords:
Carry skip adder,
low power consumption,
high performance,
speed,
delay parameters
Related subjects:
Engineering,
Introductions and overviews,
Engineering, other

© 2017 T.R. Dinesh Kumar, K. Mohana Sundaram, M. Anto Bennet, R. Aruna, B. Meena, M. Mohanapriya, published by Professor Subhas Chandra Mukhopadhyay
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

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