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On the Monte Carlo Matrix Computations on Intel MIC Architecture Cover

On the Monte Carlo Matrix Computations on Intel MIC Architecture

Cybernetics and Information Technologies
Volume 17 (2017): Issue 5 (December 2017)
By: Aneta Karaivanova,  Vassil Alexandrov,  Todor Gurov and  Sofiya Ivanovska  
Open Access
|Jan 2018
Authors

Authors

Aneta Karaivanova

anet@parallel.bas.bg

Institute of Information and Communication Technologies, Bulgarian Academy of Sciences, 1113, Sofia, Bulgaria

Vassil Alexandrov

vassil.alexandrov@bsc.es

Barcelona Supercomputing Centre (BSC),, Barcelona, Spain

Todor Gurov

gurov@parallel.bas.bg

Institute of Information and Communication Technologies, Bulgarian Academy of Sciences, 1113, Sofia, Bulgaria

Sofiya Ivanovska

sofia@parallel.bas.bg

Institute of Information and Communication Technologies, Bulgarian Academy of Sciences, 1113, Sofia, Bulgaria
DOI: https://doi.org/10.1515/cait-2017-0054 | Journal eISSN: 1314-4081 | Journal ISSN: 1311-9702
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Language: English
Page range: 49 - 59
Published on: Jan 16, 2018
Published by: Bulgarian Academy of Sciences, Institute of Information and Communication Technologies
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year
Keywords:
Monte Carlo,
matrix computations,
Intel MIC,
High Performance Computing (HPC) scalability
Related subjects:
Computer sciences,
Information technology

© 2018 Aneta Karaivanova, Vassil Alexandrov, Todor Gurov, Sofiya Ivanovska, published by Bulgarian Academy of Sciences, Institute of Information and Communication Technologies
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

Volume 17 (2017): Issue 5 (December 2017)
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