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Automatic parametric fault detection in complex analog systems based on a method of minimum node selection

Open Access
|Sep 2016

References

  1. Aminian, F. and Modular, A.(2007). Fault-diagnostic system for analog electronic circuit using neural networks with wavelet transform as a preprocessor, IEEE Transactions on Instrumentation and Measurement56(5): 1546–1554.10.1109/TIM.2007.904549
  2. Arabas, J. (2004). Lectures in Evolutionary Algorithms, WNT, Warsaw, (in Polish).
  3. Bilski, A. (2013). Diagnostic of complex analog systems with parametric faults using support vector machines, in T. Kwater and B. Twaróg (Eds.), Computing in Science and Technology 2012/13, University of Rzeszow, Rzeszów, pp. 7–24.
  4. Bilski, P. (2007). Automated diagnostic system using graph clustering algorithm and fuzzy logic method, 18th European Conference on Circuit Theory and Design 2007, Seville, Spain, pp. 779–782.
  5. Bilski, P. (2011). Automated selection of kernel parameters in diagnostics of analog systems, Przegląd Elektrotechniczny87(5): 9–13.
  6. Bilski, P. and Wojciechowski, J. (2007). Automated diagnostics of analog systems using fuzzy logic approach, IEEE Transactions on Instrumentation and Measurement56(6): 2175–2185.10.1109/TIM.2007.908152
  7. Bilski, P. and Wojciechowski, J. (2012). Current research trends in diagnostics of analog systems, 2012 International Conference on IEEE Signals and Electronic Systems (ICSES), Wrocław, Poland, pp. 1–11.
  8. Bushell, L. and Vishwani, D.A. (2002). Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits, Springer US, New York, NY.10.1007/b117406
  9. Czaja, Z. and Zielonko, R. (2004). On fault diagnosis of analogue electronic circuits based on transformations in multidimensional spaces, Measurement35(3): 293–301.10.1016/j.measurement.2003.10.004
  10. Chakrabarti, S., Cherubal, S. and Chatterjee, A. (1999). Fault diagnosis for mixed-signal electronic systems, IEEE Aerospace Conference, Snowmass at Aspen, CO, USA, pp. 169–179.
  11. Chatterjee, A., Kim, B. and Nagi, N. (1996). DC built-in self-test for linear analog circuits, IEEE Design and Test of Computers13(2): 26–33.10.1109/54.500198
  12. Fang, L., Plamen, K.N. and Sule, O. (2006). Parametric fault diagnosis for analog circuits using a Bayesian framework, Proceedings of the 24th IEEE VLSI Test Symposium VTS’06, Berkeley, CA, USA, pp. 272–277.
  13. Gendreau, M. (2003). An introduction to tabu search, in F. Glover and G.A. Kochenberger (Eds.), Handbook of Meta-heuristics, Springer, US, New York, NY, pp. 37–54.10.1007/0-306-48056-5_2
  14. Grzechca, D., Golonek, T. and Rutkowski, J. (2006). Analog fault AC dictionary creation—the fuzzy set approach, IEEE International Symposium on Circuits and Systems, Kos, Greece, pp. 5744–5747.
  15. Grzechca, D., Golonek, T. and Rutkowski, J. (2007). Simulated annealing with fuzzy fitness function for test frequencies selection, Proceedings of the IEEE Conference on Fuzzy Systems, London, UK, pp. 1–6.
  16. Grasso, F., Luchetta, A., Manetti, S. and Piccirilla, M.C. (2007). Method for the automatic selection of test frequencies in analog fault diagnosis, IEEE Transactions on Instrumentation and Measurement56(6): 2322–2329.10.1109/TIM.2007.907947
  17. Golonek, T., Grzechca, D. and Rutkowski, J. (2008). Optimization of PWL analog testing excitation by means of genetic algorithm, Proceedings of the International Conference on Signals and Electronic Systems, Kraków, Poland, pp. 541–548
  18. Golonek, T. and Rutkowski, J. (2007). Genetic-algorithm-based method for optimal analog test points selection, IEEE Transactions on Circuits and Systems II54(2): 117–121.10.1109/TCSII.2006.884112
  19. Guo, Y.-M., Wang, X.-T., Liu, Ch., Zheng, Y.-F. and Cai, X.-B. (2014). Electronic system fault diagnosis with optimized multi-kernel SVM by improved CPSO, Maintenance and Reliability16(1): 85–91.
  20. Hochwald, W. and Bastian, J.D. (1979). A DC dictionary approach for analog fault dictionary determination, IEEE Transactions on Circuits and Systems26(7): 523–529.10.1109/TCS.1979.1084665
  21. Huertas, I.L (1993). Test and design for testability of analog and mixed-signal integrated circuits: Theoretical basis and pragmatical approaches, Proceedings of the European Conference on Circuit Theory and Design, Davos, Switzerland, pp. 1389–1407.
  22. Huang, K., Stratigopoulos, H.-G. and Mir, S. (2010). Fault diagnosis of analog circuits based on machine learning, 2010 Design, Automation and Test in Europe Conference and Exhibition (DATE 2010), Dresden, Germany, pp. 1761–1766.
  23. Jantos, P., Grzechca, D. and Rutkowski, J. (2009). A global parametric faults diagnosis with the use of artificial neural networks, European Conference on Circuit Theory and Design, Antalya, Turkey, pp. 651–655.
  24. Jantos, P., Grzechca, D. and Zielonko, R. (2009). Global parametric faults identification in analog electronic circuits, Metrology and Measurement Systems16(3): 391–402.
  25. Korbicz, J., Obuchowicz, A. and Uciński, D. (1994). Artificial Neural Networks. Fundamentals and Applications, PLJ, Warsaw, (in Polish).
  26. Kuczyński, A. and Ossowski, M. (2009). Analog circuits diagnosis using discrete wavelet transform of supply current, Metrology and Measurement Systems16(1): 77–85.
  27. Milor, L.S. (1998). A tutorial introduction to research on analog and mixed-signal circuit testing, IEEE Transactions on Circuits and Systems II41(10): 1389–1407.10.1109/82.728852
  28. Nguyen, W.H. and Golinval, J.-C. (2010). Fault detection based on kernel principal component analysis, Engineering Structures32(11): pp. 3683–3691.
  29. Osowski, S. (2006). Artificial Neural Networks for Information Processing, Warsaw University of Technology Press, Warsaw, (in Polish).
  30. Ohletz, M. (1991). Hybrid built-in self-test for mixed analog/digital integrated circuits, European Test Conference, Munich, Germany, pp. 307–316.
  31. Pan, C. and Cheng, K.-T. (1995). Pseudorandom testing and signature analysis for mixed-signal systems, IEEE International Conference on Computer-Aided Design, San Jose, CA, USA, pp. 102–107.
  32. Prasad, V.C. and Babu, N.S.C. (2000). Selection of test nodes for analog fault diagnosis in dictionary approach, IEEE Transactions on Instrumentation and Measurement49(6): 1289–1297.10.1109/19.893273
  33. Rutkowski, J. and Grzechca, D. (2009). Fault diagnosis in analog electronic circuits—the SVM approach, Metrology and Measurement Systems16(4): 583–598.
  34. Salama, A.E., Starzyk, J.A. and Bandler, J.W. (1984). A unified decomposition approach for fault location in large analog circuits, IEEE Transactions on Circuits and Systems31(7): 609–622.10.1109/TCS.1984.1085558
  35. Sałat, R. and Osowski, S. (2011). Support vector machine for soft fault location in electrical circuits, Journal of Intelligent and Fuzzy Systems22(1): 21–31.10.3233/IFS-2010-0471
  36. Sen, N. and Saeks, R. (1979). Fault diagnosis for linear systems via multifrequency measurements, IEEE Transactions on Circuits and Systems26(7): 457–465.10.1109/TCS.1979.1084659
  37. Starzyk, J.A. and Dai, H. (1992). A decomposition approach for testing large analog networks, Journal of Electronic Testing: Theory and Applications3(3): 181–195.10.1007/BF00134729
  38. Starzyk, J.A., Liu, D., Liu, Z.-H., Nelson, D.E. and Rutkowski, J. (2004). Entropy-based optimum test points selection for analog fault dictionary techniques, IEEE Transactions on Instrumentation and Measurement53(2): 754–761.10.1109/TIM.2004.827085
  39. Sun, J., Wang, Ch., Sun, J. and Wang, L. (2013). Analog circuit soft fault diagnosis based on PCA and PSO-SVM, Journal of Networks8(12): 2791–2796.10.4304/jnw.8.12.2791-2796
  40. Spina, R. and Upadhyaya, S. (1997). Linear circuit fault diagnosis using neuromorphic analyzers, IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing44(3): 188–196.10.1109/82.558453
  41. Tadeusiewicz, M., Hałgas, S. and Korzybski, M. (2011). Multiple catastrophic fault diagnosis of analog circuits considering the component tolerances, International Journal of Circuit Theory Application44(3): 188–196.10.2478/v10178-011-0002-1
  42. Tadeusiewicz, M. and Korzybski, M. (2000). A method for fault diagnosis in linear electronic circuits, International Journal of Circuit Theory and Applications28(3): 245–262.10.1002/(SICI)1097-007X(200005/06)28:3<;245::AID-CTA103>3.0.CO;2-X
  43. Tadeusiewicz, M. and Hałgas, S. (2006). An algorithm for multiple fault diagnosis in analogue circuits, International Journal of Circuit Theory and Applications34(6): 607–615.10.1002/cta.374
  44. Widodo, A. and Bo-Suk, T. (2007). Support vector machine in machine condition monitoring and fault diagnosis, Mechanical Systems and Signal Processing21(6): 2560–2574.10.1016/j.ymssp.2006.12.007
  45. Wang, P. and Yang, S. (2005). A new diagnosis approach for handling tolerance in analog and mixed-signal circuits by using fuzzy math, IEEE Transactions on Circuits and Systems I: Regular Papers52(10): 2118–2127.10.1109/TCSI.2005.853266
  46. Vapnik, V. and Cortes, C. (1995). Support-vector networks, Machine Learning20(3): 273–297.10.1007/BF00994018
DOI: https://doi.org/10.1515/amcs-2016-0045 | Journal eISSN: 2083-8492 | Journal ISSN: 1641-876X
Language: English
Page range: 655 - 668
Submitted on: Oct 24, 2014
Accepted on: Mar 9, 2016
Published on: Sep 29, 2016
Published by: University of Zielona Góra
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year

© 2016 Adrian Bilski, Jacek Wojciechowski, published by University of Zielona Góra
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.