Have a personal or library account? Click to login
Open Access
|Jun 2024

References

  1. “An 796: Cyclone® v and arria® v soc device design guidelines”.
  2. “Ibm quantum composer”. https://quantumcomputing.ibm.com/composer/files/new. Accessed: 27/6/2022.
  3. “React library”, https://reactjs.org.
  4. “Spring framework”, https://spring.io.
  5. “Atlas-soc kit - user manual”, 2015.
  6. A. M. Caulfiield, E. S. Chung, A. Putnam, H. Angepat, J. Fowers, M. Haselman, S. Heil, M. Humphrey, P. Kaur, J.-Y. Kim, D. Lo, T. Massengill, K. Ovtcharov, M. Papamichael, L. Woods, S. Lanka, D. Chiou, and D. Burger, “A cloud-scale acceleration architecture”. In: 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2016, 1–13. doi: 10.1109/MICRO.2016.7783710.
  7. M. C. Herbordt, Y. Gu, T. VanCourt, J. Model, B. Sukhwani, and M. Chiu, “Computing models for fpga-based accelerators”, Computing in Science Engineering, vol. 10, no. 6, 2008, 35–45. doi: 10.1109/MCSE.2008.143.
  8. S. Hoover, “Hardware accelerated web applications using cloud fpgas”, 2018.
  9. Z. Jiang, N. Audsley, D. Shill, K. Yang, N. Fisher, and Z. Dong, “Brief industry paper: Axiinterconnectrt: Towards a real-time axiinterconnect for system-on- chips”. In: 2021 IEEE 27th Real-Time and Embedded Technology and Applications Symposium (RTAS), 2021, 437–440. doi: 10.1109/RTAS52030.2021.00046.
  10. M. Levental, “Tensor networks for simulating quantum circuits on fpgas”, 2021.
  11. X. Li, C. Fei, and D. Maskell, “Fpga overlays: Hardware-based computing for the masses”, 2018. doi: 10.15224/978-1-63248-144-3-12.
  12. S. Mittal, “A survey of fpga-based accelerators for convolutional neural networks”, Neural Computing and Applications, vol. 32, 2020. doi: 10.1007/s00521-018-3761-1.
  13. R. Skhiri, V. Fresse, J. Jamont, B. Suffran, and J. Malek, “From fpga to support cloud to cloud of fpga: State of the art”, International Journal of Reconfigurable Computing, vol. 2019, 2019, 1–17. doi: 10.1155/2019/8085461.
  14. A. Wicaksana, “Portable infrastructure for heterogeneous reconfigurable devices in a cloud fpga environment”, 2018.
DOI: https://doi.org/10.14313/jamris/2-2024/9 | Journal eISSN: 2080-2145 | Journal ISSN: 1897-8649
Language: English
Page range: 17 - 23
Submitted on: Feb 24, 2023
Accepted on: Jul 13, 2023
Published on: Jun 23, 2024
Published by: Łukasiewicz Research Network – Industrial Research Institute for Automation and Measurements PIAP
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year

© 2024 Jacek Długopolski, Jakub Czerski, Mateusz Knapik, published by Łukasiewicz Research Network – Industrial Research Institute for Automation and Measurements PIAP
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.