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A Method of Reducing Switch Count in Three-Level NPC Inverter – Analysis in Steady States Cover

A Method of Reducing Switch Count in Three-Level NPC Inverter – Analysis in Steady States

Open Access
|Dec 2017

Abstract

The proof of a concept for a new method of modulation has been presented which reduce switch count in a three-level neutral point clamped (3L-NPC) inverter. The method is an implementation of space vector modulation (SVM) by means of a prediction algorithm and sequences of transistors, which are not common in use. Those sequences make active use of clamping diodes of the inverter. The prediction algorithm analyzes possible sequences of transistors’ states and choose those which offers smaller switch count. Measurements of steady states were taken on prototype 3L-NPC.

DOI: https://doi.org/10.5277/ped170202 | Journal eISSN: 2543-4292 | Journal ISSN: 2451-0262
Language: English
Page range: 117 - 126
Submitted on: Jun 28, 2017
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Accepted on: Sep 25, 2017
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Published on: Dec 29, 2017
In partnership with: Paradigm Publishing Services
Publication frequency: 1 issue per year

© 2017 Ryszard Beniak, Krzysztof Rogowski, published by Wroclaw University of Science and Technology
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.