On the Performance of the Parallel Implementation of the Shallow Water Model on Distributed Memory Architectures
By: K Ganeshamoorthy, DN Ranasinghe, KPMK Silva and R Wait
Open Access
|Dec 2009Authors
K Ganeshamoorthy
Department of Computation & Intelligent Systems, University of Colombo School of Computing, Colombo-7, Sri Lanka
DN Ranasinghe
Department of Computation & Intelligent Systems, University of Colombo School of Computing, Colombo-7, Sri Lanka
KPMK Silva
Department of Computation & Intelligent Systems, University of Colombo School of Computing, Colombo-7, Sri Lanka
R Wait
International Science Programme and Department of Information Technology, Uppsala University, Uppsala, Sweden
DOI: https://doi.org/10.4038/icter.v2i1.1399 | Journal eISSN: 2550-2794
Language: English
Page range: 3 - 10
Published on: Dec 9, 2009
Published by: University of Colombo School of Computing
In partnership with: Paradigm Publishing Services
Keywords:
© 2009 K Ganeshamoorthy, DN Ranasinghe, KPMK Silva, R Wait, published by University of Colombo School of Computing
This work is licensed under the Creative Commons License.