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New Digital Architecture of CNN for Pattern Recognition Cover

New Digital Architecture of CNN for Pattern Recognition

Open Access
|Jun 2011

Abstract

The paper deals with the design of a new digital CNN (Cellular Neural Network) architecture for pattern recognition. The main parameters of the new design were the area consumption of the chip and the speed of calculation in one iteration. The CNN was designed as a digital synchronous circuit. The largest area of the chip belongs to the multiplication unit. In the new architecture we replaced the parallel multiplication unit by a simple AND gate performing serial multiplication. The natural property of this method of multiplication is rounding. We verified some basic properties of the proposed CNN such as edge detection, filling of the edges and noise removing. At the end we compared the designed network with other two CNNs. The new architecture allows to save till 86% gates in comparison with CNN with parallel multipliers.

DOI: https://doi.org/10.2478/v10187-010-0031-6 | Journal eISSN: 1339-309X | Journal ISSN: 1335-3632
Language: English
Page range: 222 - 228
Published on: Jun 7, 2011
Published by: Slovak University of Technology in Bratislava
In partnership with: Paradigm Publishing Services
Publication frequency: 6 issues per year

© 2011 Emil Raschman, Roman Záluský, Daniela Ďuračková, published by Slovak University of Technology in Bratislava
This work is licensed under the Creative Commons License.

Volume 61 (2010): Issue 4 (July 2010)