Parallel implementation of local thresholding in Mitrion-C
By: Tomasz Kryjak and Marek Gorgoń
Open Access
|Sep 2010References
- Asano, S., Maruyama, T. and Yamaguchi, Y. (2009). Performance comparison of FPGA, GPU and CPU in image processing,, pp. 126-131.
- Canto, E., Fons, M., Lopez, M. and Ramos, R. (2009). Acceleration of complex algorithms on a fast reconfigurable embedded system on Spartan-3,, pp. 429-434.
- Cho, J., Jin, S., Pham, X., Kim, D. and Jeon, J. (2007). FPGA-based real-time visual tracking system using adaptive color histograms,, pp. 172-177.
- Claus, C., Huitl, R., Rausch, J. and Stechele, W. (2009). Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation,, pp. 138-145.
- Denolf, K., Neuendorffer, S. and Vissers, K. (2009). Using C-to-gates to program streaming image processing kernels efficiently on FPGAs,, pp. 626-630.
- Edwards, S. (2006). The challenges of synthesizing hardware from C-like languages,(5): 375-386.
- El-Araby, E., Nosum, P. and El-Ghazawi, T. (2007). Productivity of high-level languages on reconfigurable computers: An HPC perspective,, pp. 257-260.
- Gocławski, J., Sekulska-Nalewajko, J., Gajewska, E. and Wielanek, M. (2009). An automatic segmentation method for scanned images of wheat root systems with dark discolourations,(4): 679-689, DOI: 10.2478/v10006-009-0055-x.
- Gorgon, M. and Tadeusiewicz, R. (2000). Hardware-based image processing library for Virtex FPGA,J. Schewel, P. M. Athanas, C. H. Dick and J. T. McHenrz (Eds.), Proceedings of SPIE, Vol. 4212, pp. 1-10.
- Ibarra-Manzano, M., Devy, M., Boizard, J.-L., Lacroix, P. and Fourniols, J.-Y. (2009). An efficient reconfigurable architecture to implement dense stereo vision algorithm using high-level synthesis,, pp. 444-447.
- Impulse C (2009). Impulse accelerated technologies website
- Jabłoński, M., Przybyło, J. and Gorgon, M. (2006). Real-time implementation of motion detection algorithm based on Pixelstreams,, pp. 186-190.
- Jin, S., Cho, J., Kwon, K. and Jeon, J. (2009). A dedicated hardware architecture for real-time auto-focusing using an FPGA,(5): 727-734.
- Kalaycioglu, C., Ulusel, O. and Hamzaoglu, I. (2009). Low power techniques for motion estimation hardware,, pp. 180-185.
- Kokufuta, K. and Maruyama, T. (2009). Real-time processing of local contrast enhancement on FPGA,, pp. 288-293.
- Lai, H.-C., Savvides, M. and Chen, T. (2007). Proposed FPGA hardware architecture for high frame rate (100 fps) face detection using feature cascade classifiers,, Crystal City, VA, USA, pp. 1-6.
- Mitrion-C (2009). Mitrion website
- MitrionUserGuide (2008). Mitrion user guide—Image processing using Sobel convolution, Mitrionics AB, Lund.
- Murthy, S., Alvis, W., Shirodkar, R., Valavanis, K. and Moreno, W. (2008). Methodology for implementation of unmanned vehicle control on FPGA using system generator,, pp. 1-6.
- Otsu, N. (1979). A threshold selection method from gray level histograms,(1): 62-66.
- Piromsopa, K., Aporntewan, C. and Chogsatitvataa, P. (2001). An FPGA implementation of a fixed-point square root operation,, pp. 587-689.
- Plavec, F., Vranesic, Z. and Brown, S. (2009). Enhancements to FPGA design methodology using streaming,, pp. 294-301.
- Rafajłowicz, E., Wnuk, M. and Rafajłowicz, W. (2008). Local detection of defects from image sequences,(4): 581-592, DOI: 10.2478/v10006-008-0051-6.
- Russ, J. C. (2002)., 4th Edn., CRC Press, Inc., Boca Raton, FL.
- Sauvola, J. and Pietikainen, M. (2000). Adaptive document image binarization,(2): 225-236.
- Sezgin, M. and Sankur, B. (2004). Survey over image thresholding techniques and quantitative performance evaluation,(1): 146-165.
- Shafait, F., Keysers, D. and Breuel, T. M. (2008). Efficient implementation of local adaptive thresholding techniques using integral images,, pp. 681510-681510-6.
- Sotiropoulos, I. and Papaefstathiou, I. (2009). A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems,, pp. 276-281.
- Vitabile, S., Gentile, A., Siniscalchi, S. and Sorbello, F. (2004). Efficient rapid prototyping of image and video processing algorithms,, pp. 452-458.
- Wiatr, K. (2003)., WNT, Warsaw, (in Polish).
- Wildermann, S., Walla, G., Ziermann, T. and Teich, J. (2009). Self-organizing multi-cue fusion for FPGA-based embedded imaging,, pp. 132-137.
Language: English
Page range: 571 - 580
Published on: Sep 27, 2010
Published by: University of Zielona Góra
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year
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© 2010 Tomasz Kryjak, Marek Gorgoń, published by University of Zielona Góra
This work is licensed under the Creative Commons License.