Space Vector Pulse Width Modulation for High-Speed Induction Motor Implemented in Nios II Softcore Processor

Maciej Chojowski

doi:10.2478/pead-2018-0009

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Space Vector Pulse Width Modulation for High-Speed Induction Motor Implemented in Nios II Softcore Processor

Power Electronics and Drives

Volume 3 (2018): Issue 1 (December 2018)

By: Maciej Chojowski

Open Access

|Nov 2018

Abstract

The purpose of the article was to present the idea of space vector pulse width modulation (SVPWM) and implementation in Nios II softcore processor. The SVPWM module was described in a classical method in hardware description language both as an independent structure and as an additional component to softcore processor. The available methods were compared, and the experiment was carried out in the laboratory to test implemented SVPWM algorithm using high-speed induction motor.

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Articles in this issue

DOI: https://doi.org/10.2478/pead-2018-0009 | Journal eISSN: 2543-4292 | Journal ISSN: 2451-0262

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Language: English

Page range: 99 - 107

Submitted on: Feb 15, 2018

Accepted on: May 31, 2018

Published on: Nov 17, 2018

Published by: Wroclaw University of Science and Technology

In partnership with: Paradigm Publishing Services

Publication frequency: 1 issue per year

Keywords:

Induction motor,

FPGA,

Softcore processor

Related subjects:

Computer sciences,

Artificial intelligence,

Engineering,

Electrical engineering,

Electronics

© 2018 Maciej Chojowski, published by Wroclaw University of Science and Technology
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

Volume 3 (2018): Issue 1 (December 2018)