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Voltage THD limits for three- and single-phase multilevel inverters Cover

Voltage THD limits for three- and single-phase multilevel inverters

By: Abir Rehaoulia  
Open Access
|Nov 2022

Abstract

This paper deals with single and three phase multilevel inverters power quality. The voltage total harmonic distortion rate is an important criterion for choosing the number of inverter levels and checking compatibility with power quality requirements. In this study, the author raises an interesting issue related to the definition of voltage THD boundaries with upper and lower limits. The problem is reformulated, and a novel and more practical approach is developed for three- and single-phase multilevel inverters. Found upper and lower voltage THD limits are sufficiently verified with most known switching algorithms like sinusoidal modulation (SM) with phase disposition (PD), space vector modulation (SVM) and selective harmonic elimination (SHE). They are also valid for cascaded (H-Bridge), neutral point clamped (NPC) and flying capacitors (FC) multilevel inverters.

DOI: https://doi.org/10.2478/jee-2022-0050 | Journal eISSN: 1339-309X | Journal ISSN: 1335-3632
Language: English
Page range: 363 - 367
Submitted on: Sep 28, 2022
Published on: Nov 15, 2022
Published by: Slovak University of Technology in Bratislava
In partnership with: Paradigm Publishing Services
Publication frequency: 6 issues per year

© 2022 Abir Rehaoulia, published by Slovak University of Technology in Bratislava
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.