References
- Manna, K., Chattopadhaya, S. Sengupta, I., An efficient routing technique for mesh-of-tree-based NoC and its performance comparison. International Journal of High Performance Systems Architecture, v4, n1, pp. 25–37, 2012.
- Lizhong Chen et al., NoRD: Node-Router Decoupling for Effective Power-gating of On-Chip Routers. Proc. Of IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012, pp. 270–281, 2012.
- Ghosal, Prasun, Das, Tuhin Subhra, FL2STAR. A novel topology for on-chip routing in NoC with fault tolerance and deadlock prevention. 2013 IEEE International Conference on Electronics, Computing and Communication Technologies, CONECCT2013, 2013.
- Viswanathan et al., An optimised 3D topology for on-chip communications. International Journal of Parallel, Emergent and Distributed Systems, v29, n4, pp. 346–362, 2014.
- Michihiro Koibuchi et al., A Case for Random Shortcut Topologies for HPC Interconnects. 2012 39th International Symposium on Computer Architecture, ISCA 2012, pp. 177–188, 2012.
- Ebrahimi et al, LEAR-A low-weight and highly adaptive routing method for distributing congestions in on-Chip Networks. 20th Euromicro International Conference on Parallel, Distributed and Network-Based Processing, PDP 2012, pp. 520–524, 2012.
- Ezz-Eldin, Rabab, Magdy A. El-Moursy, and Amr M. Refaat. “Low leakage power NoC switch using AVC.” Circuits and Systems (ISCAS), 2012 IEEE International Symposium on. IEEE, 2012.