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Efficient Approaches for Designing the Logical Reversibility of Computation Cover

Efficient Approaches for Designing the Logical Reversibility of Computation

International Journal on Smart Sensing and Intelligent Systems
Volume 10 (2017): Issue 5 (January 2017)
By: M Anto Bennet,  T. Mari Selvi,  S. Mohana Priya,  S Monica and  R. Kanimozhi  
Open Access
|Sep 2017

Authors

M Anto Bennet

bennetmab@gmail.com

Faculty of Electronics and Communication Engineering, VEL TECH, Chennai, India

T. Mari Selvi

UGStudent of Electronics and Communication Engineering, VEL TECH, Chennai, India

S. Mohana Priya

UGStudent of Electronics and Communication Engineering, VEL TECH, Chennai, India

S Monica

UGStudent of Electronics and Communication Engineering, VEL TECH, Chennai, India

R. Kanimozhi

UGStudent of Electronics and Communication Engineering, VEL TECH, Chennai, India
DOI: https://doi.org/10.21307/ijssis-2017-235 | Journal eISSN: 1178-5608
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Language: English
Page range: 46 - 61
Submitted on: May 27, 2017
Accepted on: Jun 15, 2017
Published on: Sep 1, 2017
Published by: Professor Subhas Chandra Mukhopadhyay
In partnership with: Paradigm Publishing Services
Publication frequency: 1 issue per year
Keywords:
Fast Fourier Transform (FFT),
Reversible Logic Synthesis(RLS)
Related subjects:
Engineering,
Introductions and overviews,
Engineering, other

© 2017 M Anto Bennet, T. Mari Selvi, S. Mohana Priya, S Monica, R. Kanimozhi, published by Professor Subhas Chandra Mukhopadhyay
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

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