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DSM Modelling for Digital Design Using Verilog HDL Cover

DSM Modelling for Digital Design Using Verilog HDL

International Journal of Advanced Network, Monitoring and Controls
Volume 2 (2017): Issue 1 (January 2017)
By: Xing Xue,  Yao Chen and  Junchao Wei  
Open Access
|Apr 2018

Authors

Xing Xue

chenyao3505@gmail.com

Faculty of economics and management, ShangLuo University, ShangLuo, China

Yao Chen

16563961@qq.com

Electronic information and electrical engineering college, ShangLuo University, Xi’an, China

Junchao Wei

weijunchao@mail.nwpu.edu.cn

School of Mechanical Engineering, Northwestern Polytechnical University, Xi’an, China
DOI: https://doi.org/10.21307/ijanmc-2017-002 | Journal eISSN: 2470-8038
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Language: English
Page range: 59 - 64
Published on: Apr 8, 2018
Published by: Xi’an Technological University
In partnership with: Paradigm Publishing Services
Publication frequency: 4 issues per year
Keywords:
design structure matrix,
modeling,
Verilog HDL,
digital design
Related subjects:
Computer sciences,
Computer sciences, other

© 2018 Xing Xue, Yao Chen, Junchao Wei, published by Xi’an Technological University
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 4.0 License.

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