Abstract
This paper presents reconfigurable hardware architecture for smart road traffic system based on Field Programmable Gate Array (FPGA). The design can be reconfigured for different timing of the traffic signals according to the received and collected data read by the different sensors on the road; the design has been described using VHDL (VHSIC Hardware Description Language). The SRTM (Smart Road Traffic Management) System has some more features that help passenger to avoid traffic jamming by sending the collected information through web/mobile applications to find the best road between the start and destination points, which will be displayed on Google maps, at the same time it will also shows the points of traffic jamming on Google maps. SRTM system can also manage emergency vehicles such as ambulance and fire fighter and also can send snapshots and video streaming for different roads and junctions to show the points of traffic jamming. The design has been simulated and tested using ModelSim PE student edition 10.4. Spartan 3 FPGA starter kit from Xilinx has been used for implementing and testing the design in a hardware level.