Δ-Σ Modulators in Frequency Synthsizers
By:
References
- [1] Egan, W.F., Frequency synthesis by phase lock, John Wiley & Sons, New York, 2000, pp.376.
- [2] Ian Galton, Delta-Sigma Fractional-N Phase-Locked Loops, in Phase-Locking in High-Performance Systems: From Devices to Architectures, B. Razavi, Ed. New York: Wiley, 2003, pp.23-33.
- [3] T. A. Riley, M. Copeland, T. Kwasniewski, Delta-sigma modulation in fractional-N frequency synthesis, Source IEEE Journal of Solid-State Circuits, vol. 28, May 1999, pp. 553-559.
- [4] Miller, B., Conley, R., A multiple modulator fractional divider, IEEE Transactions on Instrumentation and Measurement, June 1991, vol.40, pp. 578-583.
- [5] Johns, D.A., Martin, K., Analog Integrated Circuit Design, John Wiley, 1997.
- [6] Shu, K., Sanchez-Sinencio, E., CMOS PLL Synthesizers: Analysis and Design, Springer Science + Business Media, Inc., Boston, 2005, pp.69-101.
- [7] Bertran Bakkaloglu, Sayfe Kiaei, Bikram Chaudhuri, Delta-Sigma (Δ-Σ) frequency synthesizers for wireless applications, Computers Standard & Interfaces, volume 29, Issue 1, January 2007, pp. 19-30.
DOI: https://doi.org/10.1515/kbo-2016-0099 | Journal eISSN: 2451-3113
Language: English
Page range: 576 - 579
Published on: Jul 27, 2016
Published by: Nicolae Balcescu Land Forces Academy
In partnership with: Paradigm Publishing Services
Publication frequency: 3 issues per year
Keywords:
Related subjects:
© 2016 Emil Teodoru, published by Nicolae Balcescu Land Forces Academy
This work is licensed under the Creative Commons Attribution-NonCommercial-NoDerivatives 3.0 License.